Wearable medical devices have enabled continuous diagnosis and monitoring of patients through physiological signal acquisition and processing. Intensive digital signal processing is required to extract clinical information, however, wearable devices have stringent energy and size constraints. This thesis studies and presents an optimized ultra-low power SoC for Electrocardiogram (ECG) processing. In the course of this research work, two ECG processing system-on-chips (SoCs) were designed, implemented, fabricated and lab tested. In the first SoC, an ultra-low power system for full ECG feature extraction was designed and implemented. An ECG full feature extraction system that is based on combined Curve Length Transform (CLT) and Discrete Wavelet Transform (DWT), was presented that takes advantage of each technique's relevant strengths in delineating ECG characteristic points. CLT through a single transform provided a less complicated QRS detection scheme, while DWT has inherent behavior to suppress noise and using it on a windowed signal requires less resources. High energy efficiency in the presented SoC was achieved through architectural opti- mization and by applying clock gating. A pipelined architecture for ECG filtering and CLT maximized the throughput and reduced the required resources. The pipelined architecture for CLT reduced the resources by 32x compared to straight forward implementation without reusing resources. The prototype chip, which performed full ECG feature extraction, was fabricated using 65nm CMOS LPe process and consumed only 0.642μW, when operating at a frequency of 7.5KHz and a supply voltage of 0.6V. In the second SoC, an ECG processor for Cardiac Autonomic Neuropathy (CAN) ii detection with integrated full ECG feature extraction was designed and imple- mented. This is the first hardware real-time implementation of the CAN severity detector. The QRS detection was performed with Absolute Value Curve Length Transform (ACLT), whereas full feature extraction (detecting QRSon, QRSoff , P−, T−,waves) was achieved by low-pass differentiation. The proposed QRS detector attained a sensitivity of 99.37% and a predictivity of 99.38 %. The extracted RR interval, along with QT interval, enabled CAN severity detection. The CAN detection was based on RR variability and QT variability analysis. The RR variability metrics were based on mean RR interval and root mean square of standard difference (RMSSD) of RR interval. The proposed SoC was fabricated using 65nm CMOS LPe process consumed only 75nW at 0.6V, when operating at 250 Hz. In addition, an improved hardware architecture for VA prediction was included, which achieved a reduction in the required area for VA prediction system by 16.0% and a saving in power consumption by 62.2% relative to a baseline VA prediction architecture which had relatively more memory. Moreover, a QRS detection architecture for Internet of Things (IoT) health de- vices that utilizes an ACLT was designed and implemented. It employed a real- time QRS detector and ECG compression architecture for energy constrained IoT healthcare wearable devices. The implementation of the architectures required adders, shifters, and comparators only, and removes the need for any multipliers. The QRS detections was accomplished by using adaptive thresholds in the ACLT transformed ECG signal. The proposed QRS detector achieved a sensitivity of 99.37% and a predictivity of 99.38% when validated using databases acquired from Physionet. Furthermore, a lossless compression technique was incorporated into the proposed architecture that uses the ECG signal first derivative and vari- able bit length encoding. An average compression ratio of 2.05 was achieved when evaluated using MIT-BIH database. The proposed QRS detection architecture was implemented using 65nm CMOS LPe process, it consumed an ultra-low-power of 6.5nW when operated at a supply of 1V and a frequency of 250Hz. Ultra-low power dissipation of the proposed systems makes them novel candidates iii for IoT healthcare wearable devices.Though the proposed architectures targeted ECG signal processing, they could be easily extended to process other biomedical signals for other diagnosing applications such as safe exercise, sleep apnea detection, ... etc.
Date of Award | Dec 2017 |
---|
Original language | American English |
---|
Supervisor | Hani Saleh (Supervisor) |
---|
- Electrocardiogram
- QRS detection
- ECG features
- Discrete
Wavelet Transform
- Curve Length Transform
- Cardiac Autonomic Neuropathy.
Ultra Low Power ECG Processing System for IoT Devices
Habte, T. (Author). Dec 2017
Student thesis: Doctoral Thesis