Fabrication, Characterization and Modeling P-channel III-V MOSFET Competitive with Ge P-channel MOSFET

  • Khaled S. Alnuaimi

Student thesis: Master's Thesis


The CMOS device channel material for sub-10nm dimensions has been identified to be major challenge as per the ITRS roadmap. Among the options that are defined by ITRS roadmap is the high mobility III-V based channels. The overall goal of this research is to focus on new III-V materials that are capable of achieving nanometer scale transistors, in support of applications that can operate at 0.3-0.5 V. Our research is focusing on developing the Sb channel based FinFET devices. One of the key challenges is to develop an optimum metal contact to the III-V FinFET channel. In the first phase of this research we are focusing on Molybdenum/InGaAs contacts (moving to InGaSb channels later) to develop basic unit processes and characterization techniques. In this thesis we are focusing on the interface characterization between the two layers and presenting our electrical and material assessment. This involves electrical measurements followed by detailed Mo/InGaAs interface studies using SEM, FIB and TEM techniques. The characterization process is focused on studying the effect of different fabrication processes and splits on the quality of the Molybdenum/InGaAs interface. To characterize this, Kelvin structures of Molybdenum over InGaAs were fabricated as test structures to measure the sheet resistivity and the contact resistance of the different samples. In order to study the effect of various fabrication steps, different experimental processes are carried out. This is crossed with exposure to plasma damage and the use of digital etch to clean the channel to metal interface.
Date of AwardJul 2014
Original languageAmerican English
SupervisorIrfan Saadat (Supervisor)


  • Complementary Metal-Oxide-Semiconductor (CMOS); III-V MOSFETs; Ge.

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