Efficient Hyperdimensional Computing: AI algorithms, Applications, and Hardware Implementations

Abstract

The rise of Internet of Things (IoT) devices has led to a growing demand for intelligent embedded systems capable of complex computations and real-time feedback. However, implementing AI at the edge poses challenges, such as limited resources, constrained power budgets, cloud connectivity, and the need for immediate responsiveness. Traditional deep learning methods, such as convolutional neural networks (CNNs), have gained popularity in implementing embedded intelligence, providing high performance. However, the high accuracy of CNNs comes at a significant computation cost, storage requirements, and the need for extensive and diverse datasets, hindering their applicability in resource-constrained scenarios requiring real-time responses with limited training data. Researchers have explored non-conventional computing paradigms to address these challenges, with hyperdimensional computing (HDC) emerging as a promising alternative. Inspired by the structure and processing of the human brain, HDC uses high-dimensional vectors, known as hypervectors, to represent and process information holographically. HDC offers several advantages over CNNs, such as low computational complexity, distributed and parallel processing, and robust performance with small training datasets. However, HDC’s learning capability is relatively lower than CNNs, and preliminary comparisons reveal that while HDC’s performance is comparable to CNNs for 1D data, CNNs outperform HDC for 2D data. Building on that, this thesis introduces Hyperdimensional Computing (HDC) as a novel, brain-inspired computing paradigm to tackle the challenges of on-device intelligence in the IoT era. The research is structured around three pivotal contributions. First, the thesis explores HDC’s attributes, such as rapid learning, noise robustness, and efficient performance, with a minimal training dataset. A significant contribution is the cascading of HDC with a well-known vision technique, specifically the Spatial Vision Transformer (STN), resulting in a novel approach named "TransHD." This innovation enhances HDC’s applicability to 2-dimensional data, accelerating inference by 3.4x and improving energy efficiency by 5x compared to conventional CNN networks. Second, the research extends HDC’s scope by exploring its applicability for grasping in robotics using neuromorphic data generated from Dynamic Vision Sensors (DAVIS). This approach, called "GraspHD," overcomes challenges in grasping, such as high latency, limited training samples, and noisy input. It demonstrates a 10x speed improvement and 26x higher energy efficiency than existing deep learning algorithms. Third, recognizing the importance of hardware optimization in achieving HDC’s full potential, the thesis delves into hardware acceleration. It proposes a digital design for hyperdimensional associative memory (HDAM), exploring the design space for both sequential (SDHAM) and parallel (PDHAM) options. The results demonstrate that the SDHAM implementation enhances the area and energy by 1.6x and 4x compared to the PDHAM design at the latency cost. Additionally, the results improve the area and energy delay by 4.6x and 5.6x compared to the state-of-the-art. By focusing on accelerating associative memory at the inference stage and integrating logic and memory in the encoding phase, this hardware realization represents a significant stride towards making HDC a viable solution for resource-constrained edge computing devices. This thesis comprehensively explores HDC as a transformative approach to modern computing, aligning with the urgent need for on-device intelligence and IoT generation efficiency. The evaluations and results underscore HDC’s potential, setting the stage for future research and development in this field.

Date of Award	27 Dec 2023
Original language	American English
Supervisor	Baker Mohammad (Supervisor)