Disturbance rejection optimization algorithm for a grid-connected voltage source converter

Abstract

As a result of the massive undergoing developments in the semiconductor industry, pulse-width modulated (PWM) power converters are becoming more feasible. Such converters offer nearly sinusoidal input current, good power factor and compactness. The control of such converters stands as a significant issue as it determines the stability and power quality of the system. The utilization of such converters in the voltage source converter high voltage DC (VSC-HVDC) transmission system is investigated in this thesis. The efficiency of an HVDC system depends merely on the converter topology utilized and the control scheme applied. The most common converter topology utilized in such a system is the VSC Graetz Bridge with PWM technique. Regarding the control scheme, most HVDC Light systems use decoupled dq-vector control with linear PIcontrollers. The tuning of those PI-controllers is investigated. This thesis proposes a new approach for PI-parameters selection, used in the decoupled dq-vector control scheme, based on first-order-plus-time-delay (FOPTD) models. Furthermore, a non-linear optimization algorithm is developed in order to achieve optimum disturbance rejection in terms of minimizing the integral time absolute of the error (ITAE) performance index. The cost function employs a weighted-sum criterion for two sources of disturbances, namely AC input voltage fluctuation and load disturbances, which may affect the regulated DC-link voltage. Simulation results demonstrate a very similar system performance using the FOPTD tuning parameters compared to the optimum ones, where both yield a robust system against disturbances. The optimum PIparameters are verified experimentally.

Date of Award	2015
Original language	American English
Supervisor	Abdul Rahiman Beig (Supervisor)