Variable Delay Transmission Lines in advanced CMOS SOI technology

Shlomo Shlafman; Benny Sheinman; Danny Elad; Alberto Valdes-Garcia; Mihai A.T. Sanduleanu

doi:10.1109/RFIC.2014.6851672

Variable Delay Transmission Lines in advanced CMOS SOI technology

Shlomo Shlafman, Benny Sheinman, Danny Elad, Alberto Valdes-Garcia, Mihai A.T. Sanduleanu

Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

8 Scopus citations

Abstract

Variable (Delay) Transmission Lines (VTL) offer digital tuning of fabricated transmission lines to compensate for process variation in active and passive devices of RF silicon design enabling self-healing and post-production circuit tuning. A novel compact semi-analytic single ended VTL model, enabling accurate RFIC circuit level simulation to enhance design flow, was developed. VTL structures were fabricated and measured in IBM 32nm CMOS SOI technology. The 30,50,80 Ohm VTL structures, consisting of metal crossing lines between the signal line and ground plane that are connected to ground through CMOS switches, exhibit over 11%, 15%, 18% delay tuning range respectively with low insertion loss and good agreement between measured results and developed model simulations.

Original language	British English
Title of host publication	Proceedings of the 2014 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	111-114
Number of pages	4
ISBN (Print)	9781479938629
DOIs	https://doi.org/10.1109/RFIC.2014.6851672
State	Published - 2014
Event	2014 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2014 - Tampa Bay, FL, United States Duration: 1 Jun 2014 → 3 Jun 2014

Publication series

Name	Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
ISSN (Print)	1529-2517

Conference

Conference	2014 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2014
Country/Territory	United States
City	Tampa Bay, FL
Period	1/06/14 → 3/06/14

Keywords

Compact model
Self-healing
Transmission lines
Variable delay lines

Access to Document

10.1109/RFIC.2014.6851672

Cite this

Shlafman, S., Sheinman, B., Elad, D., Valdes-Garcia, A., & Sanduleanu, M. A. T. (2014). Variable Delay Transmission Lines in advanced CMOS SOI technology. In Proceedings of the 2014 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2014 (pp. 111-114). Article 6851672 (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/RFIC.2014.6851672

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title = "Variable Delay Transmission Lines in advanced CMOS SOI technology",

abstract = "Variable (Delay) Transmission Lines (VTL) offer digital tuning of fabricated transmission lines to compensate for process variation in active and passive devices of RF silicon design enabling self-healing and post-production circuit tuning. A novel compact semi-analytic single ended VTL model, enabling accurate RFIC circuit level simulation to enhance design flow, was developed. VTL structures were fabricated and measured in IBM 32nm CMOS SOI technology. The 30,50,80 Ohm VTL structures, consisting of metal crossing lines between the signal line and ground plane that are connected to ground through CMOS switches, exhibit over 11%, 15%, 18% delay tuning range respectively with low insertion loss and good agreement between measured results and developed model simulations.",

keywords = "Compact model, Self-healing, Transmission lines, Variable delay lines",

author = "Shlomo Shlafman and Benny Sheinman and Danny Elad and Alberto Valdes-Garcia and Sanduleanu, {Mihai A.T.}",

year = "2014",

doi = "10.1109/RFIC.2014.6851672",

language = "British English",

isbn = "9781479938629",

series = "Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium",

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booktitle = "Proceedings of the 2014 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2014",

address = "United States",

note = "2014 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2014 ; Conference date: 01-06-2014 Through 03-06-2014",

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Shlafman, S, Sheinman, B, Elad, D, Valdes-Garcia, A & Sanduleanu, MAT 2014, Variable Delay Transmission Lines in advanced CMOS SOI technology. in Proceedings of the 2014 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2014., 6851672, Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium, Institute of Electrical and Electronics Engineers Inc., pp. 111-114, 2014 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2014, Tampa Bay, FL, United States, 1/06/14. https://doi.org/10.1109/RFIC.2014.6851672

Variable Delay Transmission Lines in advanced CMOS SOI technology. / Shlafman, Shlomo; Sheinman, Benny; Elad, Danny et al.
Proceedings of the 2014 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2014. Institute of Electrical and Electronics Engineers Inc., 2014. p. 111-114 6851672 (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - Variable (Delay) Transmission Lines (VTL) offer digital tuning of fabricated transmission lines to compensate for process variation in active and passive devices of RF silicon design enabling self-healing and post-production circuit tuning. A novel compact semi-analytic single ended VTL model, enabling accurate RFIC circuit level simulation to enhance design flow, was developed. VTL structures were fabricated and measured in IBM 32nm CMOS SOI technology. The 30,50,80 Ohm VTL structures, consisting of metal crossing lines between the signal line and ground plane that are connected to ground through CMOS switches, exhibit over 11%, 15%, 18% delay tuning range respectively with low insertion loss and good agreement between measured results and developed model simulations.

AB - Variable (Delay) Transmission Lines (VTL) offer digital tuning of fabricated transmission lines to compensate for process variation in active and passive devices of RF silicon design enabling self-healing and post-production circuit tuning. A novel compact semi-analytic single ended VTL model, enabling accurate RFIC circuit level simulation to enhance design flow, was developed. VTL structures were fabricated and measured in IBM 32nm CMOS SOI technology. The 30,50,80 Ohm VTL structures, consisting of metal crossing lines between the signal line and ground plane that are connected to ground through CMOS switches, exhibit over 11%, 15%, 18% delay tuning range respectively with low insertion loss and good agreement between measured results and developed model simulations.

KW - Compact model

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Shlafman S, Sheinman B, Elad D, Valdes-Garcia A, Sanduleanu MAT. Variable Delay Transmission Lines in advanced CMOS SOI technology. In Proceedings of the 2014 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2014. Institute of Electrical and Electronics Engineers Inc. 2014. p. 111-114. 6851672. (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium). doi: 10.1109/RFIC.2014.6851672

Variable Delay Transmission Lines in advanced CMOS SOI technology

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