TY - JOUR
T1 - Ultra-Low Power QRS Detection and ECG Compression Architecture for IoT Healthcare Devices
AU - Tekeste, Temesghen
AU - Saleh, Hani
AU - Mohammad, Baker
AU - Ismail, Mohammed
N1 - Funding Information:
Manuscript received April 4, 2018; revised June 26, 2018 and August 6, 2018; accepted August 16, 2018. Date of publication September 26, 2018; date of current version January 18, 2019. This work was supported by the Mubadala-SRC Center of Excellence for Energy Efficient Electronic Systems Research under Contract 2013-HJ2440. This paper was recommended by Associate Editor M. Mozaffari Kermani. (Corresponding author: Temesghen Tekeste.) T. Tekeste, H. Saleh, and B. Mohammad are with the Electrical and Computer Engineering Department, Khalifa University of Science, Technology and Research, Abu Dhabi, United Arab Emirates (e-mail: temesghen. [email protected]; [email protected]; [email protected]).
Publisher Copyright:
© 2004-2012 IEEE.
PY - 2019/2
Y1 - 2019/2
N2 - An ultra-low power electrocardiogram (ECG) processing architecture with an adequate level of accuracy is a necessity for Internet of Things (IoT) medical wearable devices. This paper presents a novel real-time QRS detector and an ECG compression architecture for IoT healthcare devices. An absolute-value curve length transform (A-CLT) is proposed that effectively enhances the QRS complex detection with minimized hardware resources. The proposed architecture requires adders, shifters, and comparators only, and removes the need for any multipliers. QRS detection was accomplished by using adaptive thresholds in the A-CLT transformed ECG signal, and achieved a sensitivity of 99.37% and the predictivity of 99.38% when validated using Physionet ECG database. Furthermore, a lossless compression technique was incorporated into the proposed architecture that uses the ECG signal first derivative and entropy encoding. An average compression ratio of 2.05 was achieved when evaluated using MIT-BIH database. The proposed QRS detection architecture deals with almost all the ECG signal artifacts, such as low-frequency noise, baseline drift, and high-frequency interference with minimum hardware resources. The proposed QRS architecture was synthesized using 65-nm low-power process using standard-cell-based flow. The power consumption of the design was 6.5 nW while operating at a supply of 1 V and a frequency of 250 Hz. Moreover, the system could benefit from duty-cycling.
AB - An ultra-low power electrocardiogram (ECG) processing architecture with an adequate level of accuracy is a necessity for Internet of Things (IoT) medical wearable devices. This paper presents a novel real-time QRS detector and an ECG compression architecture for IoT healthcare devices. An absolute-value curve length transform (A-CLT) is proposed that effectively enhances the QRS complex detection with minimized hardware resources. The proposed architecture requires adders, shifters, and comparators only, and removes the need for any multipliers. QRS detection was accomplished by using adaptive thresholds in the A-CLT transformed ECG signal, and achieved a sensitivity of 99.37% and the predictivity of 99.38% when validated using Physionet ECG database. Furthermore, a lossless compression technique was incorporated into the proposed architecture that uses the ECG signal first derivative and entropy encoding. An average compression ratio of 2.05 was achieved when evaluated using MIT-BIH database. The proposed QRS detection architecture deals with almost all the ECG signal artifacts, such as low-frequency noise, baseline drift, and high-frequency interference with minimum hardware resources. The proposed QRS architecture was synthesized using 65-nm low-power process using standard-cell-based flow. The power consumption of the design was 6.5 nW while operating at a supply of 1 V and a frequency of 250 Hz. Moreover, the system could benefit from duty-cycling.
KW - absolute value curve length transform
KW - compression
KW - computational complexity
KW - Elecrocardiogram
KW - QRS complex
UR - http://www.scopus.com/inward/record.url?scp=85054236206&partnerID=8YFLogxK
U2 - 10.1109/TCSI.2018.2867746
DO - 10.1109/TCSI.2018.2867746
M3 - Article
AN - SCOPUS:85054236206
SN - 1057-7122
VL - 66
SP - 669
EP - 679
JO - IEEE Transactions on Circuits and Systems I: Regular Papers
JF - IEEE Transactions on Circuits and Systems I: Regular Papers
IS - 2
M1 - 8472297
ER -