Thin-film ZnO charge-trapping memory cell grown in a single ALD step

Feyza B. Oruc; Furkan Cimen; Ayman Rizk; Mohammad Ghaffari; Ammar Nayfeh; Ali K. Okyay

doi:10.1109/LED.2012.2219493

Thin-film ZnO charge-trapping memory cell grown in a single ALD step

Feyza B. Oruc, Furkan Cimen, Ayman Rizk, Mohammad Ghaffari, Ammar Nayfeh, Ali K. Okyay

Electrical Engineering

Bilkent University

Research output: Contribution to journal › Article › peer-review

43 Scopus citations

Abstract

A thin-film ZnO-based single-transistor memory cell with a gate stack deposited in a single atomic layer deposition step is demonstrated. Thin-film ZnO is used as channel material and charge-trapping layer for the first time. The extracted mobility and subthreshold slope of the thin-film device are 23 cm²/V · s and 720 mV/dec, respectively. The memory effect is verified by a 2.35-V hysteresis in the $I_{\rm drain}- $V_{\rm gate} curve. Physics-based TCAD simulations show very good agreement with the experimental results providing insight to the charge-trapping physics.

Original language	British English
Article number	6341043
Pages (from-to)	1714-1716
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	33
Issue number	12
DOIs	https://doi.org/10.1109/LED.2012.2219493
State	Published - 2012

Keywords

Atomic layer deposition (ALD)
Flash memory
thin-film transistor (TFT)
ZnO

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10.1109/LED.2012.2219493

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title = "Thin-film ZnO charge-trapping memory cell grown in a single ALD step",

abstract = "A thin-film ZnO-based single-transistor memory cell with a gate stack deposited in a single atomic layer deposition step is demonstrated. Thin-film ZnO is used as channel material and charge-trapping layer for the first time. The extracted mobility and subthreshold slope of the thin-film device are 23 cm2/V · s and 720 mV/dec, respectively. The memory effect is verified by a 2.35-V hysteresis in the $I\rm drain- $V\rm gate curve. Physics-based TCAD simulations show very good agreement with the experimental results providing insight to the charge-trapping physics.",

keywords = "Atomic layer deposition (ALD), Flash memory, thin-film transistor (TFT), ZnO",

author = "Oruc, {Feyza B.} and Furkan Cimen and Ayman Rizk and Mohammad Ghaffari and Ammar Nayfeh and Okyay, {Ali K.}",

note = "Funding Information: Manuscript received September 7, 2012; accepted September 14, 2012. Date of publication October 26, 2012; date of current version November 22, 2012. This work was supported in part by the European Union FP7 Marie Curie IRG under Grant 239444; by the COST NanoTP; and by the Scientific and Technological Research Council of Turkey (T{\"U}B{\'Y}TAK) under Grant 108E163, Grant 109E044, Grant 112M004, and Grant 112E052. The review of this letter was arranged by Editor S. J. Koester.",

year = "2012",

doi = "10.1109/LED.2012.2219493",

language = "British English",

volume = "33",

pages = "1714--1716",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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T1 - Thin-film ZnO charge-trapping memory cell grown in a single ALD step

AU - Oruc, Feyza B.

AU - Cimen, Furkan

AU - Rizk, Ayman

AU - Ghaffari, Mohammad

AU - Nayfeh, Ammar

AU - Okyay, Ali K.

N1 - Funding Information: Manuscript received September 7, 2012; accepted September 14, 2012. Date of publication October 26, 2012; date of current version November 22, 2012. This work was supported in part by the European Union FP7 Marie Curie IRG under Grant 239444; by the COST NanoTP; and by the Scientific and Technological Research Council of Turkey (TÜBÝTAK) under Grant 108E163, Grant 109E044, Grant 112M004, and Grant 112E052. The review of this letter was arranged by Editor S. J. Koester.

PY - 2012

Y1 - 2012

N2 - A thin-film ZnO-based single-transistor memory cell with a gate stack deposited in a single atomic layer deposition step is demonstrated. Thin-film ZnO is used as channel material and charge-trapping layer for the first time. The extracted mobility and subthreshold slope of the thin-film device are 23 cm2/V · s and 720 mV/dec, respectively. The memory effect is verified by a 2.35-V hysteresis in the $I\rm drain- $V\rm gate curve. Physics-based TCAD simulations show very good agreement with the experimental results providing insight to the charge-trapping physics.

AB - A thin-film ZnO-based single-transistor memory cell with a gate stack deposited in a single atomic layer deposition step is demonstrated. Thin-film ZnO is used as channel material and charge-trapping layer for the first time. The extracted mobility and subthreshold slope of the thin-film device are 23 cm2/V · s and 720 mV/dec, respectively. The memory effect is verified by a 2.35-V hysteresis in the $I\rm drain- $V\rm gate curve. Physics-based TCAD simulations show very good agreement with the experimental results providing insight to the charge-trapping physics.

KW - Atomic layer deposition (ALD)

KW - Flash memory

KW - thin-film transistor (TFT)

KW - ZnO

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DO - 10.1109/LED.2012.2219493

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VL - 33

SP - 1714

EP - 1716

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

IS - 12

M1 - 6341043

ER -

Thin-film ZnO charge-trapping memory cell grown in a single ALD step

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