Systematic design of multi-modulus/multi-function residue number system processors

V. Paliouras, T. Stouraitis

Research output: Contribution to journalConference articlepeer-review

2 Scopus citations

Abstract

A methodology for the design of novel Residue Number System (RNS) processors is presented. It results in ROM-less processors, which perform basic residue arithmetic algorithms in more than one moduli channels, either serially or concurrently. Moreover, the proposed architectures achieve area savings, while operating at a high throughput rate. Criteria for selecting the most appropriate moduli of operation are presented. The derived architectures are compared to memory- and full adder-based designs.

Original languageBritish English
Pages (from-to)79-82
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume4
StatePublished - 1994
EventProceedings of the 1994 IEEE International Symposium on Circuits and Systems. Part 3 (of 6) - London, England
Duration: 30 May 19942 Jun 1994

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