Systematic design of full adder-based architectures for convolution

D. Soudris, V. Paliouras, T. Stouraitis, A. Skavantzos, C. Goutis

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

The systematic design of full adder-based architectures for computing an 1-D circular convolution using the Residue Number System, is introduced. The proposed architectures consist of three stages that exhibit regular and modular structure. Trade offs between hardware complexity and speed are achieved by applying partitioning techniques to each stage. Through a recently-developed multiplierless algorithm, the convolution is reduced to the computation of a series of squaring operations. Based on this fact, a general graph-based methodology for designing circuits that perform raising to the Nth power modulo m is developed.

Original languageBritish English
Title of host publicationPlenary, Special, Audio, Underwater Acoustics, VLSI, Neural Networks
PagesI-389-I-392
StatePublished - 1993
Event1993 IEEE International Conference on Acoustics, Speech and Signal Processing - Minneapolis, MN, USA
Duration: 27 Apr 199330 Apr 1993

Publication series

NameProceedings - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing
Volume1
ISSN (Print)0736-7791

Conference

Conference1993 IEEE International Conference on Acoustics, Speech and Signal Processing
CityMinneapolis, MN, USA
Period27/04/9330/04/93

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