System level testing of analog functions in a mixed-signal circuit

Mahmoud A. Al-Qutayri

doi:10.1109/ICECS.2000.913050

System level testing of analog functions in a mixed-signal circuit

Mahmoud A. Al-Qutayri

Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Scopus citations

Abstract

This paper outlines the problems of testing analog circuits in general and those in a mixed-signal integrated circuit in particular. It proposes a system level testing technique based on the excitation of the circuit-under-test with a pseudo-random binary sequence and subsequent estimation of its impulse response. The fault detection capability of the test and data analysis methods are demonstrated by simulation results. It also shows a feasible test structure that can be incorporated on chip to test the analog functions.

Original language	British English
Title of host publication	ICECS 2000 - 7th IEEE International Conference on Electronics, Circuits and Systems
Pages	1026-1029
Number of pages	4
DOIs	https://doi.org/10.1109/ICECS.2000.913050
State	Published - 2000
Event	7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000 - Jounieh, Lebanon Duration: 17 Dec 2000 → 20 Dec 2000

Publication series

Name	Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems
Volume	2

Conference

Conference	7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000
Country/Territory	Lebanon
City	Jounieh
Period	17/12/00 → 20/12/00

Access to Document

10.1109/ICECS.2000.913050

Cite this

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title = "System level testing of analog functions in a mixed-signal circuit",

abstract = "This paper outlines the problems of testing analog circuits in general and those in a mixed-signal integrated circuit in particular. It proposes a system level testing technique based on the excitation of the circuit-under-test with a pseudo-random binary sequence and subsequent estimation of its impulse response. The fault detection capability of the test and data analysis methods are demonstrated by simulation results. It also shows a feasible test structure that can be incorporated on chip to test the analog functions.",

author = "Al-Qutayri, \{Mahmoud A.\}",

year = "2000",

doi = "10.1109/ICECS.2000.913050",

language = "British English",

isbn = "0780365429",

series = "Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems",

pages = "1026--1029",

booktitle = "ICECS 2000 - 7th IEEE International Conference on Electronics, Circuits and Systems",

note = "7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000 ; Conference date: 17-12-2000 Through 20-12-2000",

}

Al-Qutayri, MA 2000, System level testing of analog functions in a mixed-signal circuit. in ICECS 2000 - 7th IEEE International Conference on Electronics, Circuits and Systems., 913050, Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, vol. 2, pp. 1026-1029, 7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000, Jounieh, Lebanon, 17/12/00. https://doi.org/10.1109/ICECS.2000.913050

System level testing of analog functions in a mixed-signal circuit. / Al-Qutayri, Mahmoud A.
ICECS 2000 - 7th IEEE International Conference on Electronics, Circuits and Systems. 2000. p. 1026-1029 913050 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems; Vol. 2).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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PY - 2000

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N2 - This paper outlines the problems of testing analog circuits in general and those in a mixed-signal integrated circuit in particular. It proposes a system level testing technique based on the excitation of the circuit-under-test with a pseudo-random binary sequence and subsequent estimation of its impulse response. The fault detection capability of the test and data analysis methods are demonstrated by simulation results. It also shows a feasible test structure that can be incorporated on chip to test the analog functions.

AB - This paper outlines the problems of testing analog circuits in general and those in a mixed-signal integrated circuit in particular. It proposes a system level testing technique based on the excitation of the circuit-under-test with a pseudo-random binary sequence and subsequent estimation of its impulse response. The fault detection capability of the test and data analysis methods are demonstrated by simulation results. It also shows a feasible test structure that can be incorporated on chip to test the analog functions.

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DO - 10.1109/ICECS.2000.913050

M3 - Conference contribution

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ER -

System level testing of analog functions in a mixed-signal circuit

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