Stateful Memristor-Based Search Architecture

Computer vision and recognition is emerging as one of the important pillars in artificial intelligence systems. It is a vital way to interpret the collected data and find matching patterns that will help in real-time decision making. CMOS-based search engines suffer from density and power limitations. Memristor is a feasible candidate that is capable of performing search within a stored structure (in-memory computing). This paper proposes the first memristor-based stateful search engine architecture based on a novel stateful heterogeneous memristive XOR gate. The design is suitable for 2-D media applications, such as image matching and pattern inspection. It performs bitwise comparison using the proposed XOR gate. The output states of all XOR gates are transferred into a single analog memristor value that is read via a digital comparator. The design assumes a single memristor device for each of the incoming data, template, and result bits. Each 2-D array of input, template, and output is reordered into a single 1-D array with 3 × (N× M) structure, where N represents the number of entry data and M is the number of bits per entry. This allows for a significantly higher storage density than conventional CMOS-based or other memristor-based search engines. Simulations of the proposed architecture demonstrate functionalities in search and compare modes using an LTSpice circuit simulator. The proposed architecture achieves a 3-ns search cycle time at 0.34 nJ/database at 1.5 V/1 GHz using 2N+1 memristors.