SRAM-Based Memory Operation and Yield

Research output: Chapter in Book/Report/Conference proceedingChapterpeer-review

Abstract

The SRAM 6T cell typically is the most frequently used cell in designs requiring on-chip memory due to its fast access time and relatively small area. Its main function is to store data for the program to access; it retains the stored data so long as power is applied (volatile). The detail schematic of a 6T cell is shown in Fig. 4.1. Its design involves complex tradeoffs between the following seven factors [9, 27, 28].

Original languageBritish English
Title of host publicationAnalog Circuits and Signal Processing
PublisherSpringer
Pages37-52
Number of pages16
DOIs
StatePublished - 2014

Publication series

NameAnalog Circuits and Signal Processing
Volume116
ISSN (Print)1872-082X
ISSN (Electronic)2197-1854

Keywords

  • Bitline
  • Sense Amplifier
  • Slow PMOS (SS)
  • SRAM Cell
  • Wordline

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