Reduction of interface traps at the amorphous-silicon/crystalline-silicon interface by hydrogen and nitrogen annealing

We show a reduction in the interface trap density (D_it) at the amorphous-silicon/crystalline-silicon interface by annealing in nitrogen (95%) and hydrogen (5%) for 10, 20 and 25min at 400°C. Fabricated a-Si(n⁺)/c-Si(p)/c-Si(p⁺) heterojunction solar cells were measured both in the dark and optically under 1 sun after annealing. The dark current reduces from ~9.5×10^-4mA/cm² at -0.5V to ~3.02×10^-5mA/cm² after annealing for 25min at 400°C. Under AM1.5G the open circuit voltage (V_oc) increases from 0.57V to 0.62V. The short circuit current density (J_sc) increases from 12.1mA/cm² to 13.2mA/cm² and the fill-factor (FF) increases from 61.18% to 68.07%. The efficiency increases from 4.28% to 5.55%. The peak External Quantum Efficiency (EQE) increases from 55% to 63%. In addition, the D_it profile at the a-Si/c-Si interface is modeled and simulated. Trap Assisted Tunneling (TAT) model along with electric field enhancement via the Poole Frenkel Effect is included as Electron-Hole-Pair (EHP) generation mechanisms. Combining the simulation and annealing results reveals a 90% reduction in D_it at the a-Si/c-Si interface.