TY - GEN
T1 - Pulsed Decimal Encoding for IoT Single-Channel Dynamic Signaling
AU - Muzaffar, Shahzad
AU - Elfadel, Ibrahim M.
N1 - Funding Information:
Acknowledgments. This work has been supported by the Semiconductor Research Corporation (SRC) under the Abu Dhabi-SRC Center of Excellence on Energy-Efficient Electronic Systems (ACE4S), Contract 2013 HJ2440, with customized funding from the Mubadala Investment Company, Abu Dhabi, UAE.
Publisher Copyright:
© IFIP International Federation for Information Processing 2019.
PY - 2019
Y1 - 2019
N2 - Pulsed-Index Communication (PIC) is a recent technique for single-channel communication that is based on the principle of transmitting the indices of only the ON bits as a series of pulse streams. In this paper, a modified version of PIC, called Pulsed Decimal Communication (PDC), is presented that uses the same underlying principle but with key improvements in data rate and reliability. Like PIC, PDC is a protocol for single-channel, high-data rate, low-power dynamic signaling that does not require any clock and data recovery. It consists of a three-step algorithm, comprising a segmentation, an encoding, and a sub-segmentation step to achieve higher data rates. The segmentation step splits the data word into smaller segments and therefore smaller decimal numbers to represent them. The encoding step reduces the number of ON bits in the data and relocates them to lower indices. The sub-segmentation step further splits the segments into smaller sub-segments. The complete process significantly reduces the total number of pulses required for transmitting binary data, thus improving the data rate by about 78%. A theoretical model of the PDC protocol is exploited to estimate its data rate and derive the optimum segmentation. Furthermore, PDC is shown to be more reliable than PIC as it eliminates the variations in the number of symbols to be transmitted. The FPGA and ASIC (65 nm technology) implementations of PDC show that the low-power operation and small footprint of PIC are preserved. PDC consumes around 25μW of power at a clock frequency of 25 MHz with a gate count of approximately 2150 gates.
AB - Pulsed-Index Communication (PIC) is a recent technique for single-channel communication that is based on the principle of transmitting the indices of only the ON bits as a series of pulse streams. In this paper, a modified version of PIC, called Pulsed Decimal Communication (PDC), is presented that uses the same underlying principle but with key improvements in data rate and reliability. Like PIC, PDC is a protocol for single-channel, high-data rate, low-power dynamic signaling that does not require any clock and data recovery. It consists of a three-step algorithm, comprising a segmentation, an encoding, and a sub-segmentation step to achieve higher data rates. The segmentation step splits the data word into smaller segments and therefore smaller decimal numbers to represent them. The encoding step reduces the number of ON bits in the data and relocates them to lower indices. The sub-segmentation step further splits the segments into smaller sub-segments. The complete process significantly reduces the total number of pulses required for transmitting binary data, thus improving the data rate by about 78%. A theoretical model of the PDC protocol is exploited to estimate its data rate and derive the optimum segmentation. Furthermore, PDC is shown to be more reliable than PIC as it eliminates the variations in the number of symbols to be transmitted. The FPGA and ASIC (65 nm technology) implementations of PDC show that the low-power operation and small footprint of PIC are preserved. PDC consumes around 25μW of power at a clock frequency of 25 MHz with a gate count of approximately 2150 gates.
KW - Automatic protocol configuration
KW - Clock and data recovery
KW - Dynamic signaling
KW - Internet of Things
KW - Low-power communication
KW - Pulsed-decimal communication
KW - Pulsed-index communication
KW - Single-channel
UR - http://www.scopus.com/inward/record.url?scp=85068981380&partnerID=8YFLogxK
U2 - 10.1007/978-3-030-15663-3_6
DO - 10.1007/978-3-030-15663-3_6
M3 - Conference contribution
AN - SCOPUS:85068981380
SN - 9783030156626
T3 - IFIP Advances in Information and Communication Technology
SP - 112
EP - 132
BT - VLSI-SoC
A2 - Maniatakos, Michail
A2 - Elfadel, Ibrahim Abe M.
A2 - Sonza Reorda, Matteo
A2 - Ugurdag, H. Fatih
A2 - Monteiro, José
A2 - Reis, Ricardo
T2 - 25th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017
Y2 - 23 October 2017 through 25 October 2017
ER -