Pulsed Decimal Encoding for IoT Single-Channel Dynamic Signaling

Shahzad Muzaffar, Ibrahim M. Elfadel

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review


Pulsed-Index Communication (PIC) is a recent technique for single-channel communication that is based on the principle of transmitting the indices of only the ON bits as a series of pulse streams. In this paper, a modified version of PIC, called Pulsed Decimal Communication (PDC), is presented that uses the same underlying principle but with key improvements in data rate and reliability. Like PIC, PDC is a protocol for single-channel, high-data rate, low-power dynamic signaling that does not require any clock and data recovery. It consists of a three-step algorithm, comprising a segmentation, an encoding, and a sub-segmentation step to achieve higher data rates. The segmentation step splits the data word into smaller segments and therefore smaller decimal numbers to represent them. The encoding step reduces the number of ON bits in the data and relocates them to lower indices. The sub-segmentation step further splits the segments into smaller sub-segments. The complete process significantly reduces the total number of pulses required for transmitting binary data, thus improving the data rate by about 78%. A theoretical model of the PDC protocol is exploited to estimate its data rate and derive the optimum segmentation. Furthermore, PDC is shown to be more reliable than PIC as it eliminates the variations in the number of symbols to be transmitted. The FPGA and ASIC (65 nm technology) implementations of PDC show that the low-power operation and small footprint of PIC are preserved. PDC consumes around 25μW of power at a clock frequency of 25 MHz with a gate count of approximately 2150 gates.

Original languageBritish English
Title of host publicationVLSI-SoC
Subtitle of host publicationOpportunities and Challenges Beyond the Internet of Things - 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Revised and Extended Selected Papers
EditorsMichail Maniatakos, Ibrahim Abe M. Elfadel, Matteo Sonza Reorda, H. Fatih Ugurdag, José Monteiro, Ricardo Reis
Number of pages21
StatePublished - 2019
Event25th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017 - Abu Dhabi, United Arab Emirates
Duration: 23 Oct 201725 Oct 2017

Publication series

NameIFIP Advances in Information and Communication Technology
ISSN (Print)1868-4238
ISSN (Electronic)1868-422X


Conference25th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017
Country/TerritoryUnited Arab Emirates
CityAbu Dhabi


  • Automatic protocol configuration
  • Clock and data recovery
  • Dynamic signaling
  • Internet of Things
  • Low-power communication
  • Pulsed-decimal communication
  • Pulsed-index communication
  • Single-channel


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