Phased-Array Transmitter

Nourhan Elsayed, Hani Saleh, Baker Mohammad, Mohammed Ismail, Mihai Sanduleanu

Research output: Chapter in Book/Report/Conference proceedingChapterpeer-review

Abstract

This chapter presents the design and simulation of a 4-phased-array transmitter utilizing the Class-E based Doherty PA in 22nm FDSOI. The transmitter design includes the signal from the baseband to the front-end PA module. It utilizes a novel active 1:4 power divider preceding the PA and tunable transmission lines as delay elements. Section 7.1 discusses the conventional direct conversion transmitter architecture, and Sect. 7.2 discusses the proposed phased-array transmitter design. Section 7.3 goes into the details of the blocks used for LO quadrature generation including the polyphase filter, phase rotator, and the mixer. Sections 7.4 and 7.5 present the design of the tunable low pass filter and the low frequency VGA, respectively. Section 7.6 elaborates on the design of the power divider, while Sect. 7.7 covers the simulation results of the 4-phased-array transmitter.

Original languageBritish English
Title of host publicationAnalog Circuits and Signal Processing
PublisherSpringer
Pages71-91
Number of pages21
DOIs
StatePublished - 2022

Publication series

NameAnalog Circuits and Signal Processing
ISSN (Print)1872-082X
ISSN (Electronic)2197-1854

Keywords

  • Class-E
  • Doherty
  • Front-end
  • Mixer
  • Phase rotator
  • Phased array
  • Polyphase filter
  • Power divider
  • Transmitter
  • Tunable low pass filter

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