Permutation-Only FPGA Realization of Real-Time Speech Encryption

Mohammed F. Tolba, Wafaa S. Sayed, Ahmed G. Radwan, Salwa K. Abd-El-Hafiz, Ahmed M. Soliman

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    2 Scopus citations

    Abstract

    This paper introduces an FPGA design methodology of a sample and bit permutation speech encryption system. Pipelining method is used to build the proposed system, which can have different number of permutation levels. The security of the system is evaluated using entropy, Mean Squared Error (MSE) and correlation coefficients comparing the different permutation levels. The results demonstrate the security of the proposed system, which enables its utilization in speech telecommunication. Hardware resources comparison validates the efficiency of the system. The designs are simulated using Xilinx ISE 14.7 and realized on FPGA Xilinx Kintex 7.

    Original languageBritish English
    Title of host publication2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    Pages93-96
    Number of pages4
    ISBN (Electronic)9781538695623
    DOIs
    StatePublished - 17 Jan 2019
    Event25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018 - Bordeaux, France
    Duration: 9 Dec 201812 Dec 2018

    Publication series

    Name2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018

    Conference

    Conference25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018
    Country/TerritoryFrance
    CityBordeaux
    Period9/12/1812/12/18

    Keywords

    • Bit Permutation
    • FPGA
    • Pipelining
    • Speech Encryption

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