TY - JOUR
T1 - Optimized 9-Level Switched-Capacitor Inverter for Grid-Connected Photovoltaic Systems
AU - Baksi, Swapan Kumar
AU - Behera, Ranjan Kumar
AU - Muduli, Utkal Ranjan
N1 - Publisher Copyright:
© 2023 The Authors.
PY - 2023
Y1 - 2023
N2 - This paper introduces a novel switched-capacitor-based 9-level inverter topology to meet IEEE standards for low total harmonic distortion (THD) in grid-connected inverters. The new design addresses the trade-off between increasing output voltage levels to reduce harmonics and the consequent rise in device count. The proposed topology is streamlined, consisting of 12 switches, 3 capacitors, 2 diodes, and a single DC source. Comparative analysis with similar topologies confirms the advantages of the new design. The experimental results show that the proposed inverter achieves a THD of 13.58% in its output voltage. The topology is validated through its application in a single-stage, three-phase photovoltaic system connected to the grid. Simulations are conducted using MATLAB/Simulink to test the system's performance. Furthermore, hardware-in-the-loop experiments are performed using OPAL-RT 5700 real-time simulators to further substantiate the efficacy of the proposed topology.
AB - This paper introduces a novel switched-capacitor-based 9-level inverter topology to meet IEEE standards for low total harmonic distortion (THD) in grid-connected inverters. The new design addresses the trade-off between increasing output voltage levels to reduce harmonics and the consequent rise in device count. The proposed topology is streamlined, consisting of 12 switches, 3 capacitors, 2 diodes, and a single DC source. Comparative analysis with similar topologies confirms the advantages of the new design. The experimental results show that the proposed inverter achieves a THD of 13.58% in its output voltage. The topology is validated through its application in a single-stage, three-phase photovoltaic system connected to the grid. Simulations are conducted using MATLAB/Simulink to test the system's performance. Furthermore, hardware-in-the-loop experiments are performed using OPAL-RT 5700 real-time simulators to further substantiate the efficacy of the proposed topology.
KW - Grid-connected inverters
KW - multilevel inverters
KW - photovoltaic systems
KW - switched-capacitor
KW - total harmonic distortion
UR - http://www.scopus.com/inward/record.url?scp=85177073362&partnerID=8YFLogxK
U2 - 10.1109/TIA.2023.3332059
DO - 10.1109/TIA.2023.3332059
M3 - Article
AN - SCOPUS:85177073362
SN - 0093-9994
VL - 60
SP - 3284
EP - 3296
JO - IEEE Transactions on Industry Applications
JF - IEEE Transactions on Industry Applications
IS - 2
ER -