Operation-saving VLSI geometry engine core

K. E. Karagianni; G. Diamantakos; V. Paliouras; T. Stouraitis

Operation-saving VLSI geometry engine core

K. E. Karagianni, G. Diamantakos, V. Paliouras, T. Stouraitis

Electrical Engineering

University of Patras

Research output: Contribution to journal › Conference article › peer-review

1 Scopus citations

Abstract

A floating point geometry engine core is introduced in this paper. The proposed core is optimized for performing the 3-D geometrical transformations, including the hardware evaluation of sin x and cos x functions. The architecture exploits the structure of the transformation matrices, thus reducing the number of floating point operations required per transformation. VLSI chip implementation issues for the specific architecture are also discussed.

Original language	British English
Pages (from-to)	607-610
Number of pages	4
Journal	ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
Volume	1
State	Published - 1997
Event	Proceedings of the 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP. Part 1 (of 5) - Munich, Ger Duration: 21 Apr 1997 → 24 Apr 1997

Cite this

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title = "Operation-saving VLSI geometry engine core",

abstract = "A floating point geometry engine core is introduced in this paper. The proposed core is optimized for performing the 3-D geometrical transformations, including the hardware evaluation of sin x and cos x functions. The architecture exploits the structure of the transformation matrices, thus reducing the number of floating point operations required per transformation. VLSI chip implementation issues for the specific architecture are also discussed.",

author = "Karagianni, {K. E.} and G. Diamantakos and V. Paliouras and T. Stouraitis",

year = "1997",

language = "British English",

volume = "1",

pages = "607--610",

journal = "ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings",

issn = "0736-7791",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Proceedings of the 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP. Part 1 (of 5) ; Conference date: 21-04-1997 Through 24-04-1997",

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T1 - Operation-saving VLSI geometry engine core

AU - Karagianni, K. E.

AU - Diamantakos, G.

AU - Paliouras, V.

AU - Stouraitis, T.

PY - 1997

Y1 - 1997

N2 - A floating point geometry engine core is introduced in this paper. The proposed core is optimized for performing the 3-D geometrical transformations, including the hardware evaluation of sin x and cos x functions. The architecture exploits the structure of the transformation matrices, thus reducing the number of floating point operations required per transformation. VLSI chip implementation issues for the specific architecture are also discussed.

AB - A floating point geometry engine core is introduced in this paper. The proposed core is optimized for performing the 3-D geometrical transformations, including the hardware evaluation of sin x and cos x functions. The architecture exploits the structure of the transformation matrices, thus reducing the number of floating point operations required per transformation. VLSI chip implementation issues for the specific architecture are also discussed.

UR - http://www.scopus.com/inward/record.url?scp=0030683357&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0030683357

SN - 0736-7791

VL - 1

SP - 607

EP - 610

JO - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

JF - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

T2 - Proceedings of the 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP. Part 1 (of 5)

Y2 - 21 April 1997 through 24 April 1997

ER -

Operation-saving VLSI geometry engine core

Abstract

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