Novel high-radix residue number system multipliers and adders

V. Paliouras, T. Stouraitis

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

17 Scopus citations

Abstract

Radix-r modulo rn multipliers and adders are introduced in this paper. The proposed architectures are shown to require several times less area than previously reported architectures, for particular moduli of operation. The proposed architectures are preferable in an area-time sense for several cases. The complexity reduction is achieved by extending the carry-ignore property of modulo 2n operations to radices higher than 2, but not powers of 2. Detailed hardware complexity models are offered.

Original languageBritish English
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
PagesI-451 - I-454
StatePublished - 1999
EventProceedings of the 1999 IEEE International Symposium on Circuits and Systems, ISCAS '99 - Orlando, FL, USA
Duration: 30 May 19992 Jun 1999

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume1
ISSN (Print)0271-4310

Conference

ConferenceProceedings of the 1999 IEEE International Symposium on Circuits and Systems, ISCAS '99
CityOrlando, FL, USA
Period30/05/992/06/99

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