Novel hardware algorithm for residue evaluation

K. Karagianni, T. Stouraitis

Research output: Contribution to journalConference articlepeer-review


An efficient hardware algorithm for the conversion of an integer X to its residue modulo a predefined integer m, is introduced. The algorithm is based on successive subtractions of appropriately selected multiples of m, from the input X, and it leads to fast evaluation of the residue, via hardware of low complexity. A VLSI architecture for the implementation of the algorithm is also proposed.

Original languageBritish English
Pages (from-to)671-680
Number of pages10
JournalIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
StatePublished - 1999
Event1999 IEEE Workshop on SiGNAL Processing Systems (SiPS 99): 'Design and Implementation' - Taipei, Taiwan
Duration: 20 Oct 199922 Oct 1999


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