Novel fast and scalable parallel union-find ASIC implementation for real-time digital image segmentation

Ehab Salahat, Hani Saleh, Andrzej Sluzek, Mahmoud Al-Qutayri, Baker Mohammad, Mohammad Ismail

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

This paper presents a new fast and scalable Parallel Union-Find algorithm for image segmentation and its System-on-Chip (SoC) implementation using 65nm CMOS technology following the Application-Specific Integrated Circuit (ASIC) design flow. The algorithm is capable of labeling all foreground and background pixels, using the least possible pixels scanning. This contrasts the classical labeling algorithms that label only foreground (or background) pixels in a single run. The new algorithm utilizes only two memory blocks. In one memory block, it labels image segments using their seeds as the label and, simultaneously, the segments sizes are used as the other label in second memory block. By this parallel labeling, monitoring the image segments is very fast and efficient. With 350 MHz operating frequency, the processing rate estimated to be 2100 frames/sec, the total chip area of 15950.5 μm2 (off-chip memory) and very low-power of 0.3 mW, the SoC tends to be an excellent candidate for mobile devices and real-time applications.

Original languageBritish English
Title of host publicationIECON 2015 - 41st Annual Conference of the IEEE Industrial Electronics Society
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages3122-3125
Number of pages4
ISBN (Electronic)9781479917624
DOIs
StatePublished - 2015
Event41st Annual Conference of the IEEE Industrial Electronics Society, IECON 2015 - Yokohama, Japan
Duration: 9 Nov 201512 Nov 2015

Publication series

NameIECON 2015 - 41st Annual Conference of the IEEE Industrial Electronics Society

Conference

Conference41st Annual Conference of the IEEE Industrial Electronics Society, IECON 2015
Country/TerritoryJapan
CityYokohama
Period9/11/1512/11/15

Keywords

  • ASIC
  • Low-power
  • Parallel Labeling
  • Real-time
  • Segmentation
  • SoC
  • Union-Find Algorithm

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