Abstract
The mathematical basis and hardware implementations of new complex multipliers are discussed in this paper. Complex numbers are expressed as polynomials and they are processed via a recently developed parallel arithmetic system. The new multipliers allow a variety of implementation options and are shown to exhibit performance up to 3.5 time better than traditional techniques in multiplicative intensive environments.
Original language | British English |
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Pages (from-to) | 319-328 |
Number of pages | 10 |
Journal | Journal of VLSI Signal Processing |
Volume | 3 |
Issue number | 4 |
DOIs | |
State | Published - Oct 1991 |