Modeling of STT-MTJ for low power embedded memory applications: A comparative review

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Abstract

Spin Transfer Torque RAM (STT-RAM) has emerged as a potential candidate for universal memory. The lack of comprehensive electrical modeling for the device is hindering the adaption and design space exploration of the device. In this paper, we investigate the existing models of Spin Transfer Torque - Magnetic Tunnel Junction (STT-MTJ) along with the different implementation tools available (Spice, Verilog-A, Micro-Magnetic Simulator). The study will select the model which most resembles the device's physical parameters including static and dynamic stochastic intrinsic properties. In addition, the selected model is used to investigate several design techniques that can improve power reduction for embedded applications.

Original languageBritish English
Title of host publication2013 IEEE 20th International Conference on Electronics, Circuits, and Systems, ICECS 2013
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages719-722
Number of pages4
ISBN (Print)9781479924523
DOIs
StatePublished - 2013
Event2013 IEEE 20th International Conference on Electronics, Circuits, and Systems, ICECS 2013 - Abu Dhabi, United Arab Emirates
Duration: 8 Dec 201311 Dec 2013

Publication series

NameProceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Conference

Conference2013 IEEE 20th International Conference on Electronics, Circuits, and Systems, ICECS 2013
Country/TerritoryUnited Arab Emirates
CityAbu Dhabi
Period8/12/1311/12/13

Keywords

  • embedded memory
  • low power
  • modeling
  • MTJ
  • STTRAM

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