TY - GEN
T1 - Memory-Centric Computing for Image Classification Using SNN with RRAM
AU - Abuhamra, Nada
AU - Mohammad, Baker
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - Neuromorphic computing, exemplified by spiking neural networks (SNN), seeks to replicate human brain functionality through event-driven processes, encoding information via spikes, and adopting biological learning principles. Its comparative advantage over traditional computing lies in the event-driven nature of computations, promising notably high energy efficiency. However, the hardware implementation of SNN poses limitations for various applications. This study proposes an In-memory Computing (IMC) approach, utilizing a Resistive RAM-based (RRAM) crossbar array to expedite the SNN algorithm. The investigation scrutinizes the accuracy of three network variants - fp32, fp16, and int8 - utilizing different data types. Remarkably, by reducing the datasize to one fourth of the original size, the accuracy increased by 1.17% after retraining. Additionally, quantizing the network from fp32 to 8-bit fixed point, and using an RRAM crossbar array, yielded savings of ~1634x in memory access energy, ~1636x in memory access latency, and ∼132x in computations energy. Furthermore, utilizing the RRAM crossbar array for the acceleration of the quantized SNN algorithm yielded ∼10x reduction in average power consumption per inference, and ~159x savings in required area.
AB - Neuromorphic computing, exemplified by spiking neural networks (SNN), seeks to replicate human brain functionality through event-driven processes, encoding information via spikes, and adopting biological learning principles. Its comparative advantage over traditional computing lies in the event-driven nature of computations, promising notably high energy efficiency. However, the hardware implementation of SNN poses limitations for various applications. This study proposes an In-memory Computing (IMC) approach, utilizing a Resistive RAM-based (RRAM) crossbar array to expedite the SNN algorithm. The investigation scrutinizes the accuracy of three network variants - fp32, fp16, and int8 - utilizing different data types. Remarkably, by reducing the datasize to one fourth of the original size, the accuracy increased by 1.17% after retraining. Additionally, quantizing the network from fp32 to 8-bit fixed point, and using an RRAM crossbar array, yielded savings of ~1634x in memory access energy, ~1636x in memory access latency, and ∼132x in computations energy. Furthermore, utilizing the RRAM crossbar array for the acceleration of the quantized SNN algorithm yielded ∼10x reduction in average power consumption per inference, and ~159x savings in required area.
KW - AI accelerator
KW - IMC
KW - LIF neuron
KW - RRAM crossbar
KW - SNN
UR - https://www.scopus.com/pages/publications/85199870862
U2 - 10.1109/AICAS59952.2024.10595912
DO - 10.1109/AICAS59952.2024.10595912
M3 - Conference contribution
AN - SCOPUS:85199870862
T3 - 2024 IEEE 6th International Conference on AI Circuits and Systems, AICAS 2024 - Proceedings
SP - 105
EP - 109
BT - 2024 IEEE 6th International Conference on AI Circuits and Systems, AICAS 2024 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 6th IEEE International Conference on AI Circuits and Systems, AICAS 2024
Y2 - 22 April 2024 through 25 April 2024
ER -