TY - GEN
T1 - Mapping iterative algorithms onto processor arrays by the use of Petri Net models
AU - Karagianni, K. E.
AU - Kyriakis-Bitzaros, E. D.
AU - Stouraitis, T.
N1 - Publisher Copyright:
© 1994 IEEE.
PY - 1994
Y1 - 1994
N2 - In this paper, Petri Nets (PNs) are used for deriving efficient mapping transformations of a wide class of algorithms to processor arrays. In the proposed methodology, given an algorithm and the interconnections of the processor array, two PNs are constructed: one that is related to the algorithm and one that is related to the processor array. The former PN models the execution of the algorithm and differs drastically from the common data-flow methods. Based on properties of PNs and on the reachability tree analysis technique, a theorem is given, through which the two PN model suggest all possible ways of implementing the algorithm by the processor array.
AB - In this paper, Petri Nets (PNs) are used for deriving efficient mapping transformations of a wide class of algorithms to processor arrays. In the proposed methodology, given an algorithm and the interconnections of the processor array, two PNs are constructed: one that is related to the algorithm and one that is related to the processor array. The former PN models the execution of the algorithm and differs drastically from the common data-flow methods. Based on properties of PNs and on the reachability tree analysis technique, a theorem is given, through which the two PN model suggest all possible ways of implementing the algorithm by the processor array.
UR - http://www.scopus.com/inward/record.url?scp=85065739805&partnerID=8YFLogxK
U2 - 10.1109/MPCS.1994.367083
DO - 10.1109/MPCS.1994.367083
M3 - Conference contribution
AN - SCOPUS:85065739805
T3 - MPCS 1994 - 1st International Conference on Massively Parallel Computing Systems: The Challenges of General-Purpose and Special-Purpose Computing
SP - 140
EP - 151
BT - MPCS 1994 - 1st International Conference on Massively Parallel Computing Systems
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 1st International Conference on Massively Parallel Computing Systems: The Challenges of General-Purpose and Special-Purpose Computing, MPCS 1994
Y2 - 2 May 1994 through 6 May 1994
ER -