Low power synthesis of sum-of-products computation

K. Masselos, S. Theoharis, P. K. Merakos, T. Stouraitis, C. E. Goutis

Research output: Contribution to conferencePaperpeer-review

6 Scopus citations


Novel techniques for the power efficient synthesis of sum-of-product computations are presented. Simple and efficient heuristics for scheduling and assignment are described. Different partly static cost functions are proposed to drive the synthesis tasks. The proposed cost functions target the power consumption either in the buses connecting the functional units with the storage elements or inside the functional units. The partly static nature of the proposed cost functions reduces the time of the synthesis procedure. Experimental results from different relevant digital signal processing algorithmic kernels prove that the proposed synthesis techniques lead to significant power savings.

Original languageBritish English
Number of pages4
StatePublished - 2000
EventInternational Symposium on low Power Electronics and Design (ISLPED'2000) - Portacino Coast, Italy
Duration: 26 Jul 200027 Jul 2000


ConferenceInternational Symposium on low Power Electronics and Design (ISLPED'2000)
CityPortacino Coast, Italy


Dive into the research topics of 'Low power synthesis of sum-of-products computation'. Together they form a unique fingerprint.

Cite this