Abstract
This paper presents a novel methodology for low power implementation of one and multidimensional discrete wavelet transform. The basic computation performed by forward and inverse wavelet transform is the computation of inner products between vectors of data (either input data or wavelet coefficients of previous stages) and filter coefficients. The proposed methodology aims at reducing the switching activity of the inner product computations required by the wavelet transform, by reordering the sequence of evaluation of the partial products. The total hamming distance of the sequence of coefficients (sum of hamming distances between successive coefficients) is used as the cost function driving the reordering. Minimization of this cost function leads to switching activity reduction at the inputs of the computational units. The proposed methodology is applicable to both custom hardware and instruction set architectures. Experimental results show that the proposed methodology leads to significant switching activity and thus power consumption savings.
Original language | British English |
---|---|
Journal | European Signal Processing Conference |
Volume | 1998-January |
State | Published - 1998 |
Event | 9th European Signal Processing Conference, EUSIPCO 1998 - Island of Rhodes, Greece Duration: 8 Sep 1998 → 11 Sep 1998 |