TY - GEN
T1 - Logic Locking of Finite-State Machines Using Transition Obfuscation
AU - Muzaffar, Shahzad
AU - Elfadel, Ibrahim Abe M.
N1 - Funding Information:
This research has been sponsored by the Cryptography Research Center, Technology Innovation Institute, Abu Dhabi, UAE, under Contract TII/CRP/2036/2020. The authors would like to thank Drs. Ernesto Damiani and Abudlhadi Shoufan from Khalifa University for useful discussions
Funding Information:
ACKNOWLEDGMENT This research has been sponsored by the Cryptography Research Center, Technology Innovation Institute, Abu Dhabi, UAE, under Contract TII/CRP/2036/2020. The authors would like to thank Drs. Ernesto Damiani and Abudlhadi Shoufan from Khalifa University for useful discussions.
Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - In this paper, we introduce a novel algorithm for securing sequential circuits at the Register-Transfer Level (RTL) that does not require any state augmentation. The algorithm is based on the encryption of the state encodings with a key that is known only to the IP provider. When the correct key is input at runtime, the sequential circuit will operate as designed, otherwise it will operate according to a state transition map that is defined by the wrong key. We call this mode of operation: transition obfuscation. One important advantage of the proposed method is that using the wrong key does not necessarily result in the sequential circuit getting stuck at any one state or getting trapped within any black hole. As a result, the secured sequential circuit is more immune to reverse engineering attacks, and because of the large number of wrong full-state transition maps, more immune to side-channel attacks. A full low-complexity, RTL design methodology based on the new algorithm is presented along with extensive experiments quantifying its design overhead and illustrating its advantages in terms of immunity to reverse engineering attacks.
AB - In this paper, we introduce a novel algorithm for securing sequential circuits at the Register-Transfer Level (RTL) that does not require any state augmentation. The algorithm is based on the encryption of the state encodings with a key that is known only to the IP provider. When the correct key is input at runtime, the sequential circuit will operate as designed, otherwise it will operate according to a state transition map that is defined by the wrong key. We call this mode of operation: transition obfuscation. One important advantage of the proposed method is that using the wrong key does not necessarily result in the sequential circuit getting stuck at any one state or getting trapped within any black hole. As a result, the secured sequential circuit is more immune to reverse engineering attacks, and because of the large number of wrong full-state transition maps, more immune to side-channel attacks. A full low-complexity, RTL design methodology based on the new algorithm is presented along with extensive experiments quantifying its design overhead and illustrating its advantages in terms of immunity to reverse engineering attacks.
KW - Behavioral-level logic locking
KW - Finite-state machines
KW - Hardware security
KW - Secure automata
KW - Sequential circuits
UR - http://www.scopus.com/inward/record.url?scp=85142426133&partnerID=8YFLogxK
U2 - 10.1109/VLSI-SoC54400.2022.9939610
DO - 10.1109/VLSI-SoC54400.2022.9939610
M3 - Conference contribution
AN - SCOPUS:85142426133
T3 - IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC
BT - Proceedings of the 2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration, VLSI-SoC 2022
PB - IEEE Computer Society
T2 - 30th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2022
Y2 - 3 October 2022 through 5 October 2022
ER -