Logarithmic and Residue Number Systems for VLSI Arithmetic

This chapter describes two arithmetic systems that employ nonstandard encoding of numbers. The logarithmic number system (LNS) and the residue number system (RNS) are singled out because they are shown to offer important advantages in the efficiency of their operation and may be at the same time more power or energy-efficient, faster, and/or smaller than other systems. The impact of arithmetic in a digital system is not only limited to the definition of the architecture of arithmetic circuits. Arithmetic affects several levels of the design abstraction because it may reduce the number of operations, the signal activity, and the strength of the operators. The choice of arithmetic may lead to substantial power savings, reduced area, and enhanced speed. LNS is considered as an alternative to floating-point representation. RNS arithmetic faces difficulties with sign detection, division, and magnitude comparison. These difficulties may outweigh the benefits it presents for addition, subtraction, and multiplication as far as general computing is concerned. The chapter also discusses RNS and power dissipation.