TY - GEN
T1 - Live demonstration of DLD-VISU
T2 - 2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016
AU - Shoufan, Abdulhadi
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016/7/29
Y1 - 2016/7/29
N2 - In this demo we will present DLD-VISU which is a web-based tool for the visualization and animation of digital logic design [1]. Combinatorial circuits can be built using logic gates, multiplexers, decoders, and look-up tables. Various configurations of finite state machines can be selected to define the machine type, the state code, and the flip-flop type. Logic minimization with the K-map approach and the Quine McCluskey scheme is also supported. The tools help students practice related topics in digital logic design courses. Also, instructors can use the tools to efficiently generate and verify examples for lecture notes or for homework problems and assignments. The tools support self-assessment and reflect the student learning process using learning curves. DLD-VISU, that was developed in collaboration between Khalifa University and Technische Universität Darmstadt, has been used in teaching digital logic design since Fall 2013 with a positive impact on students' motivation and learning.
AB - In this demo we will present DLD-VISU which is a web-based tool for the visualization and animation of digital logic design [1]. Combinatorial circuits can be built using logic gates, multiplexers, decoders, and look-up tables. Various configurations of finite state machines can be selected to define the machine type, the state code, and the flip-flop type. Logic minimization with the K-map approach and the Quine McCluskey scheme is also supported. The tools help students practice related topics in digital logic design courses. Also, instructors can use the tools to efficiently generate and verify examples for lecture notes or for homework problems and assignments. The tools support self-assessment and reflect the student learning process using learning curves. DLD-VISU, that was developed in collaboration between Khalifa University and Technische Universität Darmstadt, has been used in teaching digital logic design since Fall 2013 with a positive impact on students' motivation and learning.
UR - https://www.scopus.com/pages/publications/84983391344
U2 - 10.1109/ISCAS.2016.7527522
DO - 10.1109/ISCAS.2016.7527522
M3 - Conference contribution
AN - SCOPUS:84983391344
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 1439
BT - ISCAS 2016 - IEEE International Symposium on Circuits and Systems
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 22 May 2016 through 25 May 2016
ER -
