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Lightweight, Single-Clock-Cycle, Multilayer Cipher for Single-Channel IoT Communication: Design and Implementation

  • Habib University

Research output: Contribution to journalArticlepeer-review

4 Scopus citations

Abstract

The area of lightweight cryptography for constrained nodes has been quite well researched since the advent of RFID tags. However, the important issue of the integrated design of a secure, ultra-low power, small-footprint IoT transceiver has not received sufficient attention. The objective of this paper is to present such a transceiver and evaluate its data rate and power in the presence of the cryptographic overhead and compare its security with that of prior lightweight cryptographic algorithms. The proposed secure transceiver design is based on two main novel ingredients. The first is the Edge-Coded Signaling (ECS) protocol - a recently introduced technique for single-channel, high-data rate, low-power dynamic signaling that does not require any clock and data recovery. The second ingredient is a novel high-speed symmetric block cipher, HSA5/1, that is based on the well-known A5/1 cipher and that generates a full keystream in one clock cycle. Both ingredients are combined to design a lightweight, high-speed, multilayer cipher with a tunable impact on ECS's power consumption, energy efficiency, and data rate. The multilayer cipher provides additional layers of packet security that make it difficult for an attacker to even receive a legitimate packet, let alone decrypt its data by attacking the HSA5/1 protocol itself. In addition, the multilayer encryption method may be easily configured to modulate the communication security overhead as a function of the number of clock cycles made available to the encryption/decryption stage. The secure ECS transceiver is prototyped and verified on both an embedded and an FPGA platform. It has also been synthesized for an ASIC implementation in 65nm CMOS technology that is shown to preserve the low-power operation of ECS, consuming only 27~mu W of power at a clock frequency of 25MHz while requiring only one clock cycle for executing 148-bit-key encryption/decryption unit.

Original languageBritish English
Article number9419040
Pages (from-to)66723-66737
Number of pages15
JournalIEEE Access
Volume9
DOIs
StatePublished - 2021

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

  1. SDG 7 - Affordable and Clean Energy
    SDG 7 Affordable and Clean Energy

Keywords

  • Edge-coded signaling (ECS)
  • lightweight cryptography
  • multilayer cipher
  • secure IoT communication
  • single-clock-cycle cipher

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