Abstract
Dynamic random access memory (DRAM) is one type of semiconductor memory technology that has been used in electronic systems for decades and will survive into the future for its outstanding specifications, including simplicity, low cost, and high-density architecture. However, the access time of DRAM degrades the performance of the utilized system. In- and near-memory computing resolves the memory wall problem, where off-the-shelf, unmodified, and commercial DRAM with minimal modifications are used. Bitwise operations like logic-AND, bulk initialization, computation acceleration, true random number extraction, and secure key generation are different approaches for DRAM computing. The implementation of DRAM computing paradigms involves programming the memory controller, updating the peripheral circuits, integrating low-overhead blocks near the memory, or a combination of these.
Original language | British English |
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Title of host publication | In-Memory Computing Hardware Accelerators for Data-Intensive Applications |
Publisher | Springer Nature |
Pages | 39-55 |
Number of pages | 17 |
ISBN (Electronic) | 9783031342332 |
ISBN (Print) | 9783031342325 |
DOIs | |
State | Published - 25 Sep 2023 |