Abstract
An image processing system is described using digital signal processors to perform pixel level data processing at maximum speed. The system is based on the VMEbus and consists on a number of modules working under the control of a host computer. Images are digitized by an acquisition module and transmitted to several processing modules by an interconnecting video bus. Each processing module operates on a region of the image implementing in this way a SIMD computing architecture. Finally an image acquisition and processing module is discussed which is being developed around a very recent 32-bit signal processor.
Original language | British English |
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Pages (from-to) | 41-46 |
Number of pages | 6 |
Journal | Microprocessing and Microprogramming |
Volume | 25 |
Issue number | 1-5 |
DOIs | |
State | Published - Jan 1989 |