TY - JOUR
T1 - Hyper-Dimensional Computing Challenges and Opportunities for AI Applications
AU - Hassan, Eman
AU - Halawani, Yasmin
AU - Mohammad, Baker
AU - Saleh, Hani
N1 - Funding Information:
This work was supported by the Khalifa University Competitive Internal Research Award (CIRA) under Award CIRA-2019-026 and Award RC2-2018-020.
Publisher Copyright:
© 2022 Institute of Electrical and Electronics Engineers Inc.. All rights reserved.
PY - 2022
Y1 - 2022
N2 - Brain-inspired architectures are gaining increased attention, especially for edge devices to perform cognitive tasks utilizing its limited energy budget and computing resources. Hyperdimensional computing (HDC) paradigm is an emerging framework inspired by an abstract representation of neuronal circuits’ attributes in the human brain. That includes a fully holographic random representation, high-dimension vectors representing data, and robustness to uncertainty. The basic HDC pipeline consists of an encoding, training and comparison stages. The encoding algorithm maps different representations of inputs into a single class and stores them in the associative memory (AM) throughout the training stage. Later, during the inference stage, the similarity is computed between the query vector, which is encoded using the same encoding model, and the stored classes in the AM. HDC has shown promising results for 1D applications using less power, and lower latency than state-of-the-art digital neural networks (DNN). While in 2D applications, convolutional neural network (CNN) still achieves higher classification accuracy at the expense of more computations. In this paper, a comprehensive study on the HDC paradigm, main algorithms, and its implementation is presented. Moreover, the main state-of-the-art HDC architectures for 1D and 2D applications are highlighted. The article also analyzes two competing paradigms, namely, HDC and CNN, in terms of accuracy, complexity, and the number of operations. The paper concluded by highlighting challenges and recommendations for future directions on the HDC framework.
AB - Brain-inspired architectures are gaining increased attention, especially for edge devices to perform cognitive tasks utilizing its limited energy budget and computing resources. Hyperdimensional computing (HDC) paradigm is an emerging framework inspired by an abstract representation of neuronal circuits’ attributes in the human brain. That includes a fully holographic random representation, high-dimension vectors representing data, and robustness to uncertainty. The basic HDC pipeline consists of an encoding, training and comparison stages. The encoding algorithm maps different representations of inputs into a single class and stores them in the associative memory (AM) throughout the training stage. Later, during the inference stage, the similarity is computed between the query vector, which is encoded using the same encoding model, and the stored classes in the AM. HDC has shown promising results for 1D applications using less power, and lower latency than state-of-the-art digital neural networks (DNN). While in 2D applications, convolutional neural network (CNN) still achieves higher classification accuracy at the expense of more computations. In this paper, a comprehensive study on the HDC paradigm, main algorithms, and its implementation is presented. Moreover, the main state-of-the-art HDC architectures for 1D and 2D applications are highlighted. The article also analyzes two competing paradigms, namely, HDC and CNN, in terms of accuracy, complexity, and the number of operations. The paper concluded by highlighting challenges and recommendations for future directions on the HDC framework.
KW - associative memory
KW - Brain-inspired architectures
KW - classification
KW - convolutional neural networks
KW - encoding
KW - hyperdimensional computing
UR - https://www.scopus.com/pages/publications/85100927484
U2 - 10.1109/ACCESS.2021.3059762
DO - 10.1109/ACCESS.2021.3059762
M3 - Article
AN - SCOPUS:85100927484
SN - 2169-3536
VL - 10
SP - 97651
EP - 97664
JO - IEEE Access
JF - IEEE Access
ER -