Hardware realization of a secure and enhanced s-box based speech encryption engine

Abdulaziz H. ElSafty, Mohammed F. Tolba, Lobna A. Said, Ahmed H. Madian, Ahmed G. Radwan

    Research output: Contribution to journalArticlepeer-review

    10 Scopus citations

    Abstract

    This paper presents a secure and efficient substitution box (s-box) for speech encryption applications. The proposed s-box data changes every clock cycle to swap the input signal with different data, where it generated based on a new algorithm and a memristor chaotic system. Bifurcation diagrams for all memristor chaotic system parameters are introduced to stand for the chaotic range of each parameter. Moreover, the effect of each component inside the proposed encryption system is studied, and the security of the system is validated through perceptual and statistical tests. The size of the encryption key is 175 bits to meet the global standards for the optimum encryption key width (> 128). MATLAB software is used to calculate entropy, MSE, and correlation coefficient. Both chaotic circuit and encryption/decryption schemes are designed using Verilog HDL and simulated by Xilinx ISE 14.7. Xilinx Virtex 5 FPGA kit is used to realize the proposed algorithm with a throughput 0.536 of Gbit/s. The cryptosystem is tested using two different speech files to examine its efficiency.

    Original languageBritish English
    Pages (from-to)385-397
    Number of pages13
    JournalAnalog Integrated Circuits and Signal Processing
    Volume106
    Issue number2
    DOIs
    StatePublished - Feb 2021

    Keywords

    • Bifurcation
    • FPGA
    • Memristor-based chaotic systems
    • NIST
    • Speech encryption
    • Substitution box

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