Hardware Design and Implementation

Hani Saleh, Nourhan Bayasi, Baker Mohammad, Mohammed Ismail

Research output: Chapter in Book/Report/Conference proceedingChapterpeer-review

Abstract

The chapter introduces the hardware design of an automated system for prediction and detection of cardiac arrhythmias especially VT/VF. The system’s architecture is presented, the preprocessing stage is explained, then the system control scheme is introduced, and next the specifics for the realization of the QRS complex, the P and T wave signal delineation, and the classification systems are presented. The chapter is concluded by listing the ASIC implementation results of the given system in 65-nm GlobalFoundries process.

Original languageBritish English
Title of host publicationAnalog Circuits and Signal Processing
PublisherSpringer
Pages39-49
Number of pages11
DOIs
StatePublished - 2018

Publication series

NameAnalog Circuits and Signal Processing
ISSN (Print)1872-082X
ISSN (Electronic)2197-1854

Keywords

  • 65 nm
  • ASIC implementation
  • Finite-State Machine (FSM)
  • Floor Plan, Place and Route and Chip Finishing
  • Hardware implementation
  • Simulation
  • Synthesis
  • Testbench

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