Full adder-based inner product step processors for residue and quadratic residue number systems

Seon Wook Kim, Thanos Stouraitis, Alexander Skavantzos

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Most implementations of an accumulator, a multiplier, or an accumulator-multiplier unit for residue and quadratic residue number systems are based on ROMs or PLAs. Also the architectures which perform both addition and multiplication simultaneously have been rarely reported. This paper proposes an full adder-based arithmetic unit of a modulus m, called an FA-based AUm, which performs both addition and multiplication at the same time. Since the proposed AUmS use full adders as their basic units, they lead to modular and regular designs which result in lower cost and easier implementation in VLSI.

Original languageBritish English
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
Pages1821-1829
Number of pages9
StatePublished - 1993
EventProceedings of the 1993 IEEE International Symposium on Circuits and Systems - Chicago, IL, USA
Duration: 3 May 19936 May 1993

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume3
ISSN (Print)0271-4310

Conference

ConferenceProceedings of the 1993 IEEE International Symposium on Circuits and Systems
CityChicago, IL, USA
Period3/05/936/05/93

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