Frequency synthesizer using TDTL with enhanced performance

Khalfan Al-Abdouli, Saleh R. Al-Araji, Mahmoud Al-Qutayri, Arafat Al-Dweik

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

An enhanced frequency synthesizer using a first order time delay tanlock loop (TDTL) is proposed in this work. Two adaptation mechanisms are introduced to improve the performance of the synthesizer. The first method compensates for the errors that resulted from the division process within the loop. The other adaptation technique is targeted at improving the locking performance of the loop. The later method is based on sensing the frequency at an earlier stage so that the error signal can be adapted for any frequency disturbance. The new developed synthesizer offers rapid acquisition and improved tracking performance over a wide locking range.

Original languageBritish English
Title of host publicationICSPC 2007 Proceedings - 2007 IEEE International Conference on Signal Processing and Communications
Pages656-659
Number of pages4
DOIs
StatePublished - 2007
Event2007 IEEE International Conference on Signal Processing and Communications, ICSPC 2007 - Dubai, United Arab Emirates
Duration: 14 Nov 200727 Nov 2007

Publication series

NameICSPC 2007 Proceedings - 2007 IEEE International Conference on Signal Processing and Communications

Conference

Conference2007 IEEE International Conference on Signal Processing and Communications, ICSPC 2007
Country/TerritoryUnited Arab Emirates
CityDubai
Period14/11/0727/11/07

Keywords

  • Frequency
  • Synthesizer
  • TDTL

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