FPGA implementation of fractional-order Chua's chaotic system

Ahmed J.Abd El-Maksoud; Ayman A.Abd El-Kader; Bahy G. Hassan; Mohamed A. Abdelhamed; Nader G. Rihan; Mohamed F. Tolba; Lobna A. Said; Ahmed G. Radwan; Mohamed F. Abu-Elyazeed

doi:10.1109/MOCAST.2018.8376632

FPGA implementation of fractional-order Chua's chaotic system

Ahmed J.Abd El-Maksoud, Ayman A.Abd El-Kader, Bahy G. Hassan, Mohamed A. Abdelhamed, Nader G. Rihan, Mohamed F. Tolba, Lobna A. Said, Ahmed G. Radwan, Mohamed F. Abu-Elyazeed

Nile University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

15 Scopus citations

Abstract

This paper introduces FPGA implementation of fractional order double scrolls chaotic system based on Chua circuit. Grunwald-Letnikov's (GL) definition is used to generalize the chaotic system equations into the fractional-order domain. Xilinx ISE 14.5 is used to simulate the proposed design and Artix-7 XC7A100T FPGA is used for system realization. Experimental results are presented on digital oscilloscope and the error between theoretical and experimental results is calculated. Also, various interesting attractors are obtained with respect to different parameters values and window sizes. Some techniques have been employed to increase the throughput to 7.685 Gbit/Sec with 96-bits overall output.

Original language	British English
Title of host publication	2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1-4
Number of pages	4
ISBN (Electronic)	9781538647882
DOIs	https://doi.org/10.1109/MOCAST.2018.8376632
State	Published - 8 Jun 2018
Event	7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018 - Thessaloniki, Greece Duration: 7 May 2018 → 9 May 2018

Publication series

Name	2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018

Conference

Conference	7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018
Country/Territory	Greece
City	Thessaloniki
Period	7/05/18 → 9/05/18

Keywords

Chaos
Chua's circuit
FPGA
Fractional calculus

Access to Document

10.1109/MOCAST.2018.8376632

Cite this

El-Maksoud, A. J. A., El-Kader, A. A. A., Hassan, B. G., Abdelhamed, M. A., Rihan, N. G., Tolba, M. F., Said, L. A., Radwan, A. G., & Abu-Elyazeed, M. F. (2018). FPGA implementation of fractional-order Chua's chaotic system. In 2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018 (pp. 1-4). (2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/MOCAST.2018.8376632

El-Maksoud, Ahmed J.Abd ; El-Kader, Ayman A.Abd ; Hassan, Bahy G. et al. / FPGA implementation of fractional-order Chua's chaotic system. 2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 1-4 (2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018).

@inproceedings{0acf2b21c44d493ea0764cf565b927a9,

title = "FPGA implementation of fractional-order Chua's chaotic system",

abstract = "This paper introduces FPGA implementation of fractional order double scrolls chaotic system based on Chua circuit. Grunwald-Letnikov's (GL) definition is used to generalize the chaotic system equations into the fractional-order domain. Xilinx ISE 14.5 is used to simulate the proposed design and Artix-7 XC7A100T FPGA is used for system realization. Experimental results are presented on digital oscilloscope and the error between theoretical and experimental results is calculated. Also, various interesting attractors are obtained with respect to different parameters values and window sizes. Some techniques have been employed to increase the throughput to 7.685 Gbit/Sec with 96-bits overall output.",

keywords = "Chaos, Chua's circuit, FPGA, Fractional calculus",

author = "El-Maksoud, {Ahmed J.Abd} and El-Kader, {Ayman A.Abd} and Hassan, {Bahy G.} and Abdelhamed, {Mohamed A.} and Rihan, {Nader G.} and Tolba, {Mohamed F.} and Said, {Lobna A.} and Radwan, {Ahmed G.} and Abu-Elyazeed, {Mohamed F.}",

note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018 ; Conference date: 07-05-2018 Through 09-05-2018",

year = "2018",

month = jun,

day = "8",

doi = "10.1109/MOCAST.2018.8376632",

language = "British English",

series = "2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018",

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El-Maksoud, AJA, El-Kader, AAA, Hassan, BG, Abdelhamed, MA, Rihan, NG, Tolba, MF, Said, LA, Radwan, AG & Abu-Elyazeed, MF 2018, FPGA implementation of fractional-order Chua's chaotic system. in 2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018. 2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018, Institute of Electrical and Electronics Engineers Inc., pp. 1-4, 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018, Thessaloniki, Greece, 7/05/18. https://doi.org/10.1109/MOCAST.2018.8376632

FPGA implementation of fractional-order Chua's chaotic system. / El-Maksoud, Ahmed J.Abd; El-Kader, Ayman A.Abd; Hassan, Bahy G. et al.
2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018. Institute of Electrical and Electronics Engineers Inc., 2018. p. 1-4 (2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - El-Maksoud, Ahmed J.Abd

AU - El-Kader, Ayman A.Abd

AU - Hassan, Bahy G.

AU - Abdelhamed, Mohamed A.

AU - Rihan, Nader G.

AU - Tolba, Mohamed F.

AU - Said, Lobna A.

AU - Radwan, Ahmed G.

AU - Abu-Elyazeed, Mohamed F.

PY - 2018/6/8

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N2 - This paper introduces FPGA implementation of fractional order double scrolls chaotic system based on Chua circuit. Grunwald-Letnikov's (GL) definition is used to generalize the chaotic system equations into the fractional-order domain. Xilinx ISE 14.5 is used to simulate the proposed design and Artix-7 XC7A100T FPGA is used for system realization. Experimental results are presented on digital oscilloscope and the error between theoretical and experimental results is calculated. Also, various interesting attractors are obtained with respect to different parameters values and window sizes. Some techniques have been employed to increase the throughput to 7.685 Gbit/Sec with 96-bits overall output.

AB - This paper introduces FPGA implementation of fractional order double scrolls chaotic system based on Chua circuit. Grunwald-Letnikov's (GL) definition is used to generalize the chaotic system equations into the fractional-order domain. Xilinx ISE 14.5 is used to simulate the proposed design and Artix-7 XC7A100T FPGA is used for system realization. Experimental results are presented on digital oscilloscope and the error between theoretical and experimental results is calculated. Also, various interesting attractors are obtained with respect to different parameters values and window sizes. Some techniques have been employed to increase the throughput to 7.685 Gbit/Sec with 96-bits overall output.

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BT - 2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018

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El-Maksoud AJA, El-Kader AAA, Hassan BG, Abdelhamed MA, Rihan NG, Tolba MF et al. FPGA implementation of fractional-order Chua's chaotic system. In 2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018. Institute of Electrical and Electronics Engineers Inc. 2018. p. 1-4. (2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018). doi: 10.1109/MOCAST.2018.8376632

FPGA implementation of fractional-order Chua's chaotic system

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Keywords

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