Fast Reduction and Modification of Power System Sparse Matrices

This article presents two fast, sparsity-based power system matrices computation procedures. The first is the sparse network reduction that can be used to eliminate network buses and consequently leads to the reduction of the admittance matrix size. It uses a compact storage scheme and manipulates only the non-zero elements of the admittance matrix. The second procedure is the sparse network modification that updates the factor matrices of the original admittance matrix. This avoids the reconstruction of the modified matrix from scratch and also avoids the need for its refactorization. The objective of the proposed procedures is to reduce the computational requirements in many power system applications. The tests carried out on several power system networks demonstrate that the proposed procedures are numerically stable, require less memory storage and reduce the computing time considerably.