Fast inverse square root based matrix inverse for MIMO-LTE systems

Chinmaya Mahapatra, Saad Mahboob, Victor C.M. Leung, Thanos Stouraitis

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Scopus citations

Abstract

This paper addresses the designing of a low complexity and high speed matrix inversion algorithm using fast inverse square root based on QR-decomposition and systolic array architecture. Matrix operations are the most costly computational module within MIMO-LTE receivers. We have demonstrated a novel approach of matrix inverse to reduce the MIMO receiver module cost in terms of latency and complexity. The cost is reduced by implementing a 4x4 matrix inverse in Xilinx Virtex-6 FPGA by optimizing the module for speed and power by pipelining and achieving a better throughput. The results are compared with state of art techniques of CORDIC based squared givens rotation.

Original languageBritish English
Title of host publicationProceedings - 2012 International Conference on Control Engineering and Communication Technology, ICCECT 2012
Pages321-324
Number of pages4
DOIs
StatePublished - 2012
Event2012 International Conference on Control Engineering and Communication Technology, ICCECT 2012 - Shenyang, Liaoning, China
Duration: 7 Dec 20129 Dec 2012

Publication series

NameProceedings - 2012 International Conference on Control Engineering and Communication Technology, ICCECT 2012

Conference

Conference2012 International Conference on Control Engineering and Communication Technology, ICCECT 2012
Country/TerritoryChina
CityShenyang, Liaoning
Period7/12/129/12/12

Keywords

  • CORDIC
  • Fast inverse square root
  • MIMO LTE
  • Pipelining
  • QR decomposition
  • Systolic array
  • Xilinx virtex6 FPGA

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