Enhancing 2-D Electrical Impedance Tomography Throughput With a Combined FPGA and Edge GPU-Based Hardware Accelerator

This article addresses the demands of high-resolution 2-D electrical impedance tomography (EIT) systems, which necessitate an increased number of electrodes and finer mesh structures compared to their traditional counterparts. These requirements lead to higher data acquisition and computational loads. Given the inherently inverse and ill-posed nature of EIT, achieving a high signal-to-noise ratio (SNR) and precision hardware acceleration is essential. This article introduces a field-programmable gate array (FPGA)-based data acquisition system equipped with a tunable single-frequency current source, achieving acquisition speeds exceeding 500 and 2400 frames per second (fps) for 32 and 16 electrodes, respectively, with a 500-kHz excitation signal frequency. Data processing and reconstruction utilize the latest embedded graphics processing unit (GPU), specifically NVIDIA Jetson Orin, leveraging multiple CUDA cores for parallel high-speed 2-D image reconstruction. Comparative evaluations of five algorithms, namely, linear back projection (LBP), Tikhonov (TK) regularization, one-step Gauss–Newton (GN), Landweber (LW), and iterative Tikhonov (ITK), show a speed gain of at least fourfold compared to traditional implementations on standard computers. Experimental results reveal that the proposed system can achieve over 2500 fps throughput for a 16-electrode setup with approximately 8192 mesh elements. This advancement opens new possibilities for high-speed imaging and large-scale 3-D EIT applications. (Figure presented).