@inproceedings{d670a7b4ed40467cbcc92fb4f86c4293,
title = "Dual Time Delay Digital Tanlock Loop with improved performance",
abstract = "A dual Time Delay Digital Tanlock Loop (D-TDTL) topology is proposed in this work. The system consists of a stacked dual loop of which the top one acts as a Frequency Lock loop (FLL) for the bottom loop, while the latter is a phase lock loop (PLL) that enhances the overall phase of the system. The main advantage of the proposed system is the large reduction of phase noise or jitter which makes it well suited to operate in noisy environment. The performance of the D-TDTL system was demonstrated using frequency shift keying (FSK) input signal with AWGN noise.",
keywords = "AWGN and Jitter, Dual loop, FLL, FSK, PLL, TDTL",
author = "Al-Ali, {O. Al Kharji} and Anani, {N. A.} and P. Ponnapalli and Al-Araji, {S. R.} and Al-Qutayri, {M. A.}",
year = "2011",
doi = "10.1109/EUROCON.2011.5929178",
language = "British English",
isbn = "9781424474868",
series = "EUROCON 2011 - International Conference on Computer as a Tool - Joint with Conftele 2011",
booktitle = "EUROCON 2011 - International Conference on Computer as a Tool - Joint with Conftele 2011",
note = "International Conference on Computer as a Tool, EUROCON 2011 - Joint with Conftele 2011 ; Conference date: 27-04-2011 Through 29-04-2011",
}