@inproceedings{8d261fb71faa429f95a306f22d121f92,
title = "Digital pulse frequency modulation for switched capacitor DC-DC converter on 65nm process",
abstract = "DC-DC converter is one of the most important building blocks in any System-on-Chip (SoC). DC-DC converter has the functional capabilities to supply various voltage levels to various loads of the chip in a way to achieve high power efficiency. Pulse Frequency Modulation is considered as the main control technique for voltage regulation of the Switched Capacitor DC-DC power converter. This paper proposes a design of a digital Pulse Frequency Modulation using Verilog-HDL and verified on 65nm low power process technology. The design includes the generation of the non-overlapping clock by the ring oscillator and the dead time circuit instead of the default clock. PFM has a total power of 7μW, area of 46.4μm2 and a slack time of 0.5ns.",
author = "Dima Kilani and Baker Mohammad and Hani Saleh and Mohammad Ismail",
note = "Publisher Copyright: {\textcopyright} 2014 IEEE.; 2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014 ; Conference date: 07-12-2014 Through 10-12-2014",
year = "2015",
month = feb,
day = "25",
doi = "10.1109/ICECS.2014.7050067",
language = "British English",
series = "2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "642--645",
booktitle = "2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014",
address = "United States",
}