TY - GEN
T1 - Design and analysis of SRAM cell in 4H-SiC
AU - Elgabra, Hazem
AU - Siddiqui, Aamenah
AU - Singh, Shakti
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016/7/2
Y1 - 2016/7/2
N2 - Memory forms a major part of any integrated circuit (IC) and is considered a key component of an electronic system. Though various ICs using silicon carbide (SiC) have been designed and demonstrated, yet in order to make a complete functioning electronic module in SiC, memory design and architecture are needed. In this work, we report the design and analysis of a Static Random Access (SRAM) cell in SiC, which is capable of operating at high temperatures and high speeds. The paper highlights the potential and stable operation of the cell in terms of static noise margins (Read and Hold) and access times (Read and Write). The results show that the designed cell is capable of operating even at a low supply voltage of 5 V, as opposed to the conventional 15 V used in SiC circuits. The proposed design shows stable operation across a wide temperature range (27 °C C-500 °C) and across all operating parameters, validating the potential of memory architecture in SiC.
AB - Memory forms a major part of any integrated circuit (IC) and is considered a key component of an electronic system. Though various ICs using silicon carbide (SiC) have been designed and demonstrated, yet in order to make a complete functioning electronic module in SiC, memory design and architecture are needed. In this work, we report the design and analysis of a Static Random Access (SRAM) cell in SiC, which is capable of operating at high temperatures and high speeds. The paper highlights the potential and stable operation of the cell in terms of static noise margins (Read and Hold) and access times (Read and Write). The results show that the designed cell is capable of operating even at a low supply voltage of 5 V, as opposed to the conventional 15 V used in SiC circuits. The proposed design shows stable operation across a wide temperature range (27 °C C-500 °C) and across all operating parameters, validating the potential of memory architecture in SiC.
UR - https://www.scopus.com/pages/publications/85015849925
U2 - 10.1109/MWSCAS.2016.7870160
DO - 10.1109/MWSCAS.2016.7870160
M3 - Conference contribution
AN - SCOPUS:85015849925
T3 - Midwest Symposium on Circuits and Systems
BT - 2016 IEEE 59th International Midwest Symposium on Circuits and Systems, MWSCAS 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 59th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2016
Y2 - 16 October 2016 through 19 October 2016
ER -