Comprehensive Overview of Reduced Switch Count Multilevel Inverter for PV Applications

Swapan Kumar Baksi, Ranjan Kumar Behera, Utkal Ranjan Muduli

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    11 Scopus citations

    Abstract

    This study presents multiple case studies on various multilevel inverter designs. The first case introduces a three-phase Z-source NPC inverter, which operates on a single-stage solution, improving system efficiency and reducing complexity by combining dc-dc boosting and dc-ac inversion. The second case study presents a five-level boost inverter based on the switch-capacitor technique, enabling voltage boost without extra logic circuits or modification in the PWM algorithm for capacitor voltage balancing. The third case explores a seven-level boost inverter, which provides 1.5 times voltage boost and maintains only 16.66% total harmonic distortion in output voltage. The fourth case is a nine-level inverter, producing a nine-level output voltage with a total harmonic distortion content of 13.58%. In this case, the voltages across the capacitors are self-balancing, eliminating the need for additional circuitry. The fifth case discusses a 13-level cascade boost MLI, based on a cascaded connection of two identical 7-level modules, offering 1.5 times voltage boosting and maintaining a total harmonic distortion content of 6.58%. The sixth case introduces a 15-level boost inverter, which is not fully described in this study. The last case presents a 17-level cascade inverter, achieving unity gain voltage boosting and a total harmonic distortion content of 5.18%. All inverters apply carrier-based PWM schemes based on level-shifted carrier, using different numbers of triangular carrier waves for control. These inverters show a potential for efficient, compact and flexible solutions for power conversion in various applications.

    Original languageBritish English
    Title of host publication2023 IEEE 3rd International Conference on Smart Technologies for Power, Energy and Control, STPEC 2023
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    ISBN (Electronic)9798350304732
    DOIs
    StatePublished - 2023
    Event3rd IEEE International Conference on Smart Technologies for Power, Energy and Control, STPEC 2023 - Bhubaneswar, India
    Duration: 10 Dec 202313 Dec 2023

    Publication series

    Name2023 IEEE 3rd International Conference on Smart Technologies for Power, Energy and Control, STPEC 2023

    Conference

    Conference3rd IEEE International Conference on Smart Technologies for Power, Energy and Control, STPEC 2023
    Country/TerritoryIndia
    CityBhubaneswar
    Period10/12/2313/12/23

    Keywords

    • Multilevel Inverter
    • Pulse Width Modulation
    • Reduce switch count
    • Total harmonic distortion

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