TY - GEN
T1 - Comprehensive Overview of Reduced Switch Count Multilevel Inverter for PV Applications
AU - Baksi, Swapan Kumar
AU - Behera, Ranjan Kumar
AU - Muduli, Utkal Ranjan
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - This study presents multiple case studies on various multilevel inverter designs. The first case introduces a three-phase Z-source NPC inverter, which operates on a single-stage solution, improving system efficiency and reducing complexity by combining dc-dc boosting and dc-ac inversion. The second case study presents a five-level boost inverter based on the switch-capacitor technique, enabling voltage boost without extra logic circuits or modification in the PWM algorithm for capacitor voltage balancing. The third case explores a seven-level boost inverter, which provides 1.5 times voltage boost and maintains only 16.66% total harmonic distortion in output voltage. The fourth case is a nine-level inverter, producing a nine-level output voltage with a total harmonic distortion content of 13.58%. In this case, the voltages across the capacitors are self-balancing, eliminating the need for additional circuitry. The fifth case discusses a 13-level cascade boost MLI, based on a cascaded connection of two identical 7-level modules, offering 1.5 times voltage boosting and maintaining a total harmonic distortion content of 6.58%. The sixth case introduces a 15-level boost inverter, which is not fully described in this study. The last case presents a 17-level cascade inverter, achieving unity gain voltage boosting and a total harmonic distortion content of 5.18%. All inverters apply carrier-based PWM schemes based on level-shifted carrier, using different numbers of triangular carrier waves for control. These inverters show a potential for efficient, compact and flexible solutions for power conversion in various applications.
AB - This study presents multiple case studies on various multilevel inverter designs. The first case introduces a three-phase Z-source NPC inverter, which operates on a single-stage solution, improving system efficiency and reducing complexity by combining dc-dc boosting and dc-ac inversion. The second case study presents a five-level boost inverter based on the switch-capacitor technique, enabling voltage boost without extra logic circuits or modification in the PWM algorithm for capacitor voltage balancing. The third case explores a seven-level boost inverter, which provides 1.5 times voltage boost and maintains only 16.66% total harmonic distortion in output voltage. The fourth case is a nine-level inverter, producing a nine-level output voltage with a total harmonic distortion content of 13.58%. In this case, the voltages across the capacitors are self-balancing, eliminating the need for additional circuitry. The fifth case discusses a 13-level cascade boost MLI, based on a cascaded connection of two identical 7-level modules, offering 1.5 times voltage boosting and maintaining a total harmonic distortion content of 6.58%. The sixth case introduces a 15-level boost inverter, which is not fully described in this study. The last case presents a 17-level cascade inverter, achieving unity gain voltage boosting and a total harmonic distortion content of 5.18%. All inverters apply carrier-based PWM schemes based on level-shifted carrier, using different numbers of triangular carrier waves for control. These inverters show a potential for efficient, compact and flexible solutions for power conversion in various applications.
KW - Multilevel Inverter
KW - Pulse Width Modulation
KW - Reduce switch count
KW - Total harmonic distortion
UR - http://www.scopus.com/inward/record.url?scp=85186525001&partnerID=8YFLogxK
U2 - 10.1109/STPEC59253.2023.10431075
DO - 10.1109/STPEC59253.2023.10431075
M3 - Conference contribution
AN - SCOPUS:85186525001
T3 - 2023 IEEE 3rd International Conference on Smart Technologies for Power, Energy and Control, STPEC 2023
BT - 2023 IEEE 3rd International Conference on Smart Technologies for Power, Energy and Control, STPEC 2023
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 3rd IEEE International Conference on Smart Technologies for Power, Energy and Control, STPEC 2023
Y2 - 10 December 2023 through 13 December 2023
ER -