Comparison of multipliers architectures through emulation and Handle-C FPGA implementation

This paper presents a study that compares the architectures and study's the performance of some of the major integer multiplication algorithms. This is achieved through a simulation environment that at this stage implements four major multipliers in C++ programming language and implements the same architectures in an FPGA prototype system. The environment is a flexible one and has a well-designed user interface that makes it suitable for educational use. It enables the user to emulate the multipliers for various data inputs and observe the type of operation being executed. Handle-C was used for synthesis and subsequently implementation of the multipliers in an FPGA. The multipliers involved in this study are Hennessy, carry save, ripple carry array and Wallace tree. The performance of each multiplier is assessed through a study of its area and real-time complexities.