Comparison of multipliers architectures through emulation and Handle-C FPGA implementation

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Abstract

This paper presents a study that compares the architectures and study's the performance of some of the major integer multiplication algorithms. This is achieved through a simulation environment that at this stage implements four major multipliers in C++ programming language and implements the same architectures in an FPGA prototype system. The environment is a flexible one and has a well-designed user interface that makes it suitable for educational use. It enables the user to emulate the multipliers for various data inputs and observe the type of operation being executed. Handle-C was used for synthesis and subsequently implementation of the multipliers in an FPGA. The multipliers involved in this study are Hennessy, carry save, ripple carry array and Wallace tree. The performance of each multiplier is assessed through a study of its area and real-time complexities.

Original languageBritish English
Title of host publicationIEEE International Conference on Computer Systems and Applications, 2006
PublisherIEEE Computer Society
Pages240-247
Number of pages8
ISBN (Print)1424402123, 9781424402120
DOIs
StatePublished - 2006
EventIEEE International Conference on Computer Systems and Applications, 2006 - Sharjah, United Arab Emirates
Duration: 8 Mar 20068 Mar 2006

Publication series

NameIEEE International Conference on Computer Systems and Applications, 2006
Volume2006

Conference

ConferenceIEEE International Conference on Computer Systems and Applications, 2006
Country/TerritoryUnited Arab Emirates
CitySharjah
Period8/03/068/03/06

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