Abstract
This chapter presents an ultra-low power ECG feature extraction engine. ECG signal represents the cardiac cycle and contains key features, such as QRS complex, P-wave, and T-wave, that provide important diagnostic information about cardiovascular diseases. The ECG feature extraction is based on combined techniques of CLT and DWT. A pipelined architecture for implementing CLT is proposed. The system was fabricated using GF-65 nm technology and consumed 642 nW only when operating at a frequency of 7.5 kHz from a supply voltage of 0.6 V. Ultra-low power consumption of the SoC made it suitable for self-powered wearable devices.
| Original language | British English |
|---|---|
| Title of host publication | Analog Circuits and Signal Processing |
| Publisher | Springer |
| Pages | 27-38 |
| Number of pages | 12 |
| DOIs | |
| State | Published - 2019 |
Publication series
| Name | Analog Circuits and Signal Processing |
|---|---|
| ISSN (Print) | 1872-082X |
| ISSN (Electronic) | 2197-1854 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
-
SDG 3 Good Health and Well-being
Keywords
- Clock Gating
- Feature Extraction Engine
- Power Consumption
- Thermal Energy Harvesting
- Wave Delineation
Fingerprint
Dive into the research topics of 'Combined CLT and DWT-Based ECG Feature Extractor'. Together they form a unique fingerprint.Cite this
- APA
- Author
- BIBTEX
- Harvard
- Standard
- RIS
- Vancouver