Area-throughput trade-offs for SHA-1 and SHA-256 hash functions' pipelined designs

Harris E. Michail, George S. Athanasiou, Vasileios I. Kelefouras, George Theodoridis, Thanos Stouraitis, Costas E. Goutis

Research output: Contribution to journalArticlepeer-review

12 Scopus citations

Abstract

High-throughput designs of hash functions are strongly demanded due to the need for security in every transmitted packet of worldwide e-transactions. Thus, optimized and non-optimized pipelined architectures have been proposed raising, however, important questions. Which is the optimum number of the pipeline stages? Is it worth to develop optimized designs or could the same results be achieved by increasing only the pipeline stages of the non-optimized designs? The paper answers the above questions studying extensively many pipelined architectures of SHA-1 and SHA-256 hashes, implemented in FPGAS, in terms of throughput/area (T/A) factor. Also, guides for developing efficient security schemes designs are provided.

Original languageBritish English
Article number16500328
JournalJournal of Circuits, Systems and Computers
Volume25
Issue number4
DOIs
StatePublished - 1 Apr 2016

Keywords

  • FPGA, security
  • Hash function
  • message authentication code
  • pipeline

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